| /external/swiftshader/third_party/subzero/src/ |
| IceRegistersMIPS32.h | 68 static inline GPRRegister getEncodedGPR(RegNumT RegNum) {
74 static inline bool isGPRReg(RegNumT RegNum) {
82 static inline FPRRegister getEncodedFPR(RegNumT RegNum) {
88 static inline bool isFPRReg(RegNumT RegNum) {
93 static inline FPRRegister getEncodedFPR64(RegNumT RegNum) {
99 static inline bool isFPR64Reg(RegNumT RegNum) {
104 const char *getRegName(RegNumT RegNum);
106 static inline RegNumT get64PairFirstRegNum(RegNumT RegNum) {
111 return RegNumT::fixme(((RegNum - Reg_F64PAIR_First) * 2)
[all...] |
| IceRegistersARM32.h | 105 static inline void assertValidRegNum(RegNumT RegNum) {
110 static inline bool isGPRegister(RegNumT RegNum) {
125 static inline GPRRegister getEncodedGPR(RegNumT RegNum) {
140 static inline bool isGPR(RegNumT RegNum) {
145 static inline GPRRegister getI64PairFirstGPRNum(RegNumT RegNum) {
150 static inline GPRRegister getI64PairSecondGPRNum(RegNumT RegNum) {
155 static inline bool isI64RegisterPair(RegNumT RegNum) {
160 static inline bool isEncodedSReg(RegNumT RegNum) {
175 static inline SRegister getEncodedSReg(RegNumT RegNum) {
180 static inline bool isEncodedDReg(RegNumT RegNum)
[all...] |
| IceTargetLoweringMIPS32.h | 67 Variable *getPhysicalRegister(RegNumT RegNum,
69 const char *getRegName(RegNumT RegNum, Type Ty) const override;
84 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
89 RegNumT getStackReg() const override { return RegMIPS32::Reg_SP; }
90 RegNumT getFrameReg() const override { return RegMIPS32::Reg_FP; }
91 RegNumT getFrameOrStackReg() const override {
94 RegNumT getReservedTmpReg() const { return RegMIPS32::Reg_AT; }
666 RegNumT RegNum = RegNumT());
668 Variable *legalizeToVar(Operand *From, RegNumT RegNum = RegNumT())
[all...] |
| IceOperand.h | 466 /// RegNumT is for holding target-specific register numbers, plus the sentinel
468 /// values, such as RegNumT(Reg_eax), but not things like RegNumT(Reg_eax+1).
470 /// needed, the fromInt() method can be used, such as when a RegNumT is based
472 class RegNumT {
475 RegNumT() = default;
476 RegNumT(const RegNumT &) = default;
478 RegNumT(AnyEnum Value,
483 RegNumT &operator=(const RegNumT &) = default
[all...] |
| IceRegAlloc.cpp | 90 for (RegNumT i : RegNumBVIter(RegMask)) {
342 RegAliases[Reg] = &Target->getAliasesForRegister(RegNumT::fromInt(Reg));
424 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
434 const RegNumT RegNum = *RegNumBVIter(Iter.RegMask).begin();
469 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
493 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
512 Iter.PreferReg = RegNumT();
546 Iter.PreferReg = RegNumT::fromInt(SrcReg);
572 for (RegNumT RegAlias : RegNumBVIter(Aliases)) {
605 for (RegNumT RegAlias : RegNumBVIter(Aliases))
[all...] |
| IceTargetLoweringX8632Traits.h | 279 static const char *getRegName(RegNumT RegNum) {
292 static GPRRegister getEncodedGPR(RegNumT RegNum) {
306 static ByteRegister getEncodedByteReg(RegNumT RegNum) {
320 static XmmRegister getEncodedXmm(RegNumT RegNum) {
334 static uint32_t getEncoding(RegNumT RegNum) {
347 static RegNumT getBaseReg(RegNumT RegNum) {
348 static const RegNumT BaseRegs[RegisterSet::Reg_NUM] = {
377 static RegNumT getGprForType(Type Ty, RegNumT RegNum)
[all...] |
| IceTargetLoweringX8664Traits.h | 304 static const char *getRegName(RegNumT RegNum) {
317 static GPRRegister getEncodedGPR(RegNumT RegNum) {
331 static ByteRegister getEncodedByteReg(RegNumT RegNum) {
345 static XmmRegister getEncodedXmm(RegNumT RegNum) {
359 static uint32_t getEncoding(RegNumT RegNum) {
372 static inline RegNumT getBaseReg(RegNumT RegNum) {
373 static const RegNumT BaseRegs[RegisterSet::Reg_NUM] = {
386 static RegNumT getFirstGprForType(Type Ty) {
403 static RegNumT getGprForType(Type Ty, RegNumT RegNum)
[all...] |
| IceTargetLoweringARM32.h | 94 Variable *getPhysicalRegister(RegNumT RegNum,
96 const char *getRegName(RegNumT RegNum, Type Ty) const override;
116 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
121 RegNumT getStackReg() const override { return RegARM32::Reg_sp; }
122 RegNumT getFrameReg() const override { return RegARM32::Reg_fp; }
123 RegNumT getFrameOrStackReg() const override {
126 RegNumT getReservedTmpReg() const { return RegARM32::Reg_ip; }
186 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
188 RegNumT RegNum = RegNumT())
[all...] |
| IceTargetLoweringX86Base.h | 108 Variable *getPhysicalRegister(RegNumT RegNum,
110 const char *getRegName(RegNumT RegNum, Type Ty) const override;
146 const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
153 RegNumT getStackReg() const override { return Traits::StackPtr; }
154 RegNumT getFrameReg() const override { return Traits::FramePtr; }
155 RegNumT getFrameOrStackReg() const override {
242 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
416 RegNumT RegNum = RegNumT());
[all...] |
| IceTargetLowering.h | 241 virtual Variable *getPhysicalRegister(RegNumT RegNum,
244 virtual const char *getRegName(RegNumT RegNum, Type Ty) const = 0;
248 virtual RegNumT getStackReg() const = 0;
249 virtual RegNumT getFrameReg() const = 0;
250 virtual RegNumT getFrameOrStackReg() const = 0;
305 virtual const SmallBitVector &getAliasesForRegister(RegNumT) const = 0;
311 makeRandomRegisterPermutation(llvm::SmallVectorImpl<RegNumT> &Permutation,
398 std::function<std::string(RegNumT)> getRegName,
|
| IceRegAlloc.h | 64 RegNumT PreferReg;
|
| IceTargetLoweringMIPS32.cpp | 72 std::array<RegNumT, MIPS32_MAX_GPR_ARG> GPRArgInitializer;
73 std::array<RegNumT, MIPS32_MAX_GPR_ARG / 2> I64ArgInitializer;
77 std::array<RegNumT, MIPS32_MAX_FP_ARG> FP32ArgInitializer;
78 std::array<RegNumT, MIPS32_MAX_FP_ARG> FP64ArgInitializer;
146 RegNumT::setLimit(RegMIPS32::Reg_NUM);
174 GPRArgInitializer[i] = RegNumT::fixme(RegMIPS32::Reg_A0 + i);
177 I64ArgInitializer[i] = RegNumT::fixme(RegMIPS32::Reg_A0A1 + i);
180 FP32ArgInitializer[i] = RegNumT::fixme(RegMIPS32::Reg_F12 + i * 2);
181 FP64ArgInitializer[i] = RegNumT::fixme(RegMIPS32::Reg_F12F13 + i);
226 RegNumT DummyReg
[all...] |
| IceTargetLoweringARM32.cpp | 254 std::array<RegNumT, NumGPRArgs> GPRArgInitializer;
263 std::array<RegNumT, NumI64Args> I64ArgInitializer;
272 std::array<RegNumT, NumFP32Args> FP32ArgInitializer;
281 std::array<RegNumT, NumFP64Args> FP64ArgInitializer;
290 std::array<RegNumT, NumVec128Args> Vec128ArgInitializer;
312 RegNumT::setLimit(RegARM32::Reg_NUM);
341 const auto RegNum = RegNumT::fromInt(i);
376 [](RegNumT RegNum) -> std::string {
407 RegNumT::fixme(RegARM32::getI64PairFirstGPRNum(Var->getRegNum()));
417 Hi->setRegNum(RegNumT::fixme(FirstReg + 1))
[all...] |
| IceTargetLowering.cpp | 131 std::function<std::string(RegNumT)> getRegName,
135 for (RegNumT RegNum : RegNumBVIter(Bitset)) {
176 std::function<std::string(RegNumT)> getRegName,
183 std::unordered_map<std::string, RegNumT> RegNameToIndex;
185 const auto RegNum = RegNumT::fromInt(RegIndex);
[all...] |
| IceOperand.cpp | 94 RegNumT::BaseType RegNumT::Limit = 0;
202 RegNumT NewRegNum) const {
|
| IceTargetLoweringX86BaseImpl.h | 410 RegNumT::setLimit(Traits::RegisterSet::Reg_NUM);
915 Variable *TargetX86Base<TraitsType>::getPhysicalRegister(RegNumT RegNum,
[all...] |
| IceAssemblerARM32.h | 89 TargetInfo(bool HasFramePointer, RegNumT FrameOrStackReg)
95 const RegNumT FrameOrStackReg;
|
| IceInstARM32.h | 357 void setBaseRegNum(RegNumT RegNum) { BaseRegNum = RegNum; }
358 RegNumT getBaseRegNum() const override { return BaseRegNum; }
364 RegNumT BaseRegNum;
[all...] |
| IceInstX86BaseImpl.h | [all...] |
| IceTargetLoweringX8664.cpp | 439 RegNumT RegNum, RegNum32;
|
| IceInstX86Base.h | 523 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(RegNumT),
524 SReg_t (*srcEnc)(RegNumT)>
530 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(RegNumT),
531 SReg_t (*srcEnc)(RegNumT)>
[all...] |
| IceInstARM32.cpp | [all...] |
| IceAssemblerARM32.cpp | 627 << RegARM32::getRegName(RegNumT::fixme((Inst >> kRdShift) & 0xF))
[all...] |
