| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformConfig/ |
| PlatformConfigPei.c | 27 UINT32 RegVal;
29 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange0Pei);
30 if (RegVal != 0) {
32 RegVal,
37 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange1Pei);
38 if (RegVal != 0) {
40 RegVal,
45 RegVal = PcdGet32 (PcdLegacyProtectedBIOSRange2Pei);
46 if (RegVal != 0) {
48 RegVal,
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/OmapDmaLib/ |
| OmapDmaLib.c | 43 UINT32 RegVal;
58 RegVal = MmioRead32 (DMA4_CSDP (Channel));
61 RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
62 RegVal = ((RegVal & ~(0x3 << 7)) | (DMA4->ReadPortAccessType << 7));
63 RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
64 RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));
[all...] |
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/OmapDmaLib/ |
| OmapDmaLib.c | 43 UINT32 RegVal;
58 RegVal = MmioRead32 (DMA4_CSDP (Channel));
61 RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
62 RegVal = ((RegVal & ~(0x3 << 7)) | (DMA4->ReadPortAccessType << 7));
63 RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessType << 14));
64 RegVal = ((RegVal & ~(0x1 << 21)) | (DMA4->SourceEndiansim << 21));
[all...] |
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformHelperLib/ |
| PlatformHelperLib.c | 43 UINT32 RegVal;
67 RegVal = BaseAddress + StepLen - 1;
68 RegVal &= 0x00FFF000; // Set EDS Protected Range Limit (PRL).
69 RegVal |= ((BaseAddress >> 12) & 0xfff); // or in EDS Protected Range Base (PRB).
71 RegVal = DirectValue;
76 RegVal |= B_QNC_RCRB_SPIPBRn_WPE;
77 MmioWrite32 (PchRootComplexBar + Offset, RegVal);
78 if (RegVal == MmioRead32 (PchRootComplexBar + Offset)) {
173 UINT32 RegVal;
186 RegVal = MmioRead32 (PchRootComplexBar + Offset);
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 45 unsigned RegVal;
65 return RegVal;
71 RegVal = Reg;
114 Op.RegVal = Reg;
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| MCInst.h | 42 unsigned RegVal;
60 return RegVal;
66 RegVal = Reg;
100 Op.RegVal = Reg;
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCInst.h | 47 unsigned RegVal;
67 return RegVal;
73 RegVal = Reg;
119 Op.RegVal = Reg;
|
| /hardware/intel/img/psb_video/src/mrst/ |
| lnc_hostcode.c | 96 unsigned int RegVal = 0;
98 RegVal = F_ENCODE(2, MVEA_CR_IPE_GRID_FINE_SEARCH) |
106 RegVal |= F_ENCODE(0, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(0, MVEA_CR_IPE_ENCODING_FORMAT);
111 RegVal |= F_ENCODE(1, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(1, MVEA_CR_IPE_ENCODING_FORMAT);
118 RegVal |= F_ENCODE(2, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(2, MVEA_CR_IPE_ENCODING_FORMAT);
121 RegVal |= F_ENCODE(6, MVEA_CR_IPE_Y_CANDIDATE_NUM);
122 return RegVal;
[all...] |
| /hardware/intel/img/psb_video/src/ |
| pnw_hostcode.c | 445 unsigned int RegVal = 0;
447 RegVal = F_ENCODE(2, MVEA_CR_IPE_GRID_FINE_SEARCH) |
455 RegVal |= F_ENCODE(0, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(0, MVEA_CR_IPE_ENCODING_FORMAT);
460 RegVal |= F_ENCODE(1, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(1, MVEA_CR_IPE_ENCODING_FORMAT);
467 RegVal |= F_ENCODE(2, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(2, MVEA_CR_IPE_ENCODING_FORMAT);
470 RegVal |= F_ENCODE(6, MVEA_CR_IPE_Y_CANDIDATE_NUM);
471 return RegVal;
[all...] |
| tng_hostcode.c | 342 unsigned int RegVal = 0;
344 RegVal = F_ENCODE(2, MVEA_CR_IPE_GRID_FINE_SEARCH) |
352 RegVal |= F_ENCODE(0, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(0, MVEA_CR_IPE_ENCODING_FORMAT);
357 RegVal |= F_ENCODE(1, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(1, MVEA_CR_IPE_ENCODING_FORMAT);
364 RegVal |= F_ENCODE(2, MVEA_CR_IPE_BLOCKSIZE) | F_ENCODE(2, MVEA_CR_IPE_ENCODING_FORMAT);
367 RegVal |= F_ENCODE(6, MVEA_CR_IPE_Y_CANDIDATE_NUM);
368 return RegVal;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
