| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformPcieHelperLib/ |
| PlatformPcieHelperLib.c | 28 UINT32 RegValue;
35 RegValue = IoRead32 (GpioBaseAddress + LevelRegOffset);
38 RegValue |= (GpioNumMask);
40 RegValue &= ~(GpioNumMask);
42 IoWrite32 (GpioBaseAddress + R_QNC_GPIO_RGLVL_RESUME_WELL, RegValue);
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/QNCAccessLib/ |
| QNCAccessLib.c | 303 UINT32 RegValue;
309 RegValue = QNCAltPortRead (QUARK_ICLK_SB_PORT_ID, RegAddress);
310 RegValue &= AndValue;
311 RegValue |= OrValue;
312 QNCAltPortWrite (QUARK_ICLK_SB_PORT_ID, RegAddress, RegValue);
313 QNCAltPortWrite (QUARK_ICLK_SB_PORT_ID, RegAddress, RegValue);
323 UINT32 RegValue;
329 RegValue = QNCAltPortRead (QUARK_ICLK_SB_PORT_ID, RegAddress);
330 RegValue |= OrValue;
331 QNCAltPortWrite (QUARK_ICLK_SB_PORT_ID, RegAddress, RegValue);
[all...] |
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformHelperLib/ |
| PlatformHelperLib.c | 222 UINT32 RegValue;
229 RegValue = IoRead32 (GpioBaseAddress + LevelRegOffset);
232 RegValue |= (GpioNumMask);
234 RegValue &= ~(GpioNumMask);
236 IoWrite32 (GpioBaseAddress + LevelRegOffset, RegValue);
256 UINT32 RegValue;
261 RegValue = IoRead32 (GpioBaseAddress + LevelRegOffset);
263 return ((RegValue & GpioNumMask) != 0);
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/IntelQNCLib/ |
| IntelQNCLib.c | 29 UINT32 RegValue;
62 RegValue = QNCPortRead (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_BTHCTRL);
63 RegValue &= ~(DRAM_NON_HOST_RQ_LIMIT_MASK);
64 RegValue |= (V_DRAM_NON_HOST_RQ_LIMIT << DRAM_NON_HOST_RQ_LIMIT_BP);
65 QNCPortWrite (QUARK_NC_MEMORY_MANAGER_SB_PORT_ID, QUARK_NC_MEMORY_MANAGER_BTHCTRL, RegValue);
96 RegValue = QNCPortRead (QUARK_NC_RMU_SB_PORT_ID, QUARK_NC_RMU_REG_OPTIONS_1);
97 RegValue |= OPTIONS_1_DMA_DISABLE;
98 QNCPortWrite (QUARK_NC_RMU_SB_PORT_ID, QUARK_NC_RMU_REG_OPTIONS_1, RegValue);
728 UINT32 RegValue;
733 RegValue = QNCPortRead (QUARK_NC_RMU_SB_PORT_ID, QUARK_NC_RMU_REG_CONFIG);
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Sample/Platform/Generic/RuntimeDxe/StatusCode/Lib/RtLedStatusCode/ |
| RtLedStatusCode.h | 38 UINT8 RegValue;
|
| RtLedStatusCode.c | 185 OutputData = (UINT8) mSioInitData[Index].RegValue;
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| PlatformEarlyInit.c | 737 UINT32 RegValue;
746 RegValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW);
747 if ((RegValue & B_CFG_STICKY_RW_VIOLATION) != 0) {
753 ((RegValue & B_CFG_STICKY_RW_IMR_VIOLATION) != 0) ? L"'IMR'" : L".",
754 ((RegValue & B_CFG_STICKY_RW_DECC_VIOLATION) != 0) ? L"'DECC'" : L".",
755 ((RegValue & B_CFG_STICKY_RW_SMM_VIOLATION) != 0) ? L"'SMM'" : L".",
756 ((RegValue & B_CFG_STICKY_RW_HMB_VIOLATION) != 0) ? L"'HMB'" : L"."
763 RegValue &= ~(B_CFG_STICKY_RW_VIOLATION);
764 QNCAltPortWrite (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW, RegValue);
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/CpuDxe/ |
| CpuDxe.c | 638 UINT64 RegValue;
761 RegValue = MtrrFixedSettings.Mtrr[Index];
766 MtrrType = (UINT8) RShiftU64 (RegValue, SubIndex * 8);
|
| /device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/ |
| Pci.c | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
