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Searched
refs:SCR
(Results
1 - 19
of
19
) sorted by null
/device/google/contexthub/firmware/os/platform/stm32/
pwr.c
245
SCB->
SCR
&=~ SCB_SCR_SLEEPDEEP_Msk;
248
SCB->
SCR
|= SCB_SCR_SLEEPDEEP_Msk;
251
SCB->
SCR
|= SCB_SCR_SLEEPDEEP_Msk;
255
SCB->
SCR
|= SCB_SCR_SLEEPDEEP_Msk;
259
SCB->
SCR
|= SCB_SCR_SLEEPDEEP_Msk;
platform.c
240
SCB->
SCR
&=~ SCB_SCR_SLEEPONEXIT_Msk;
/external/syslinux/com32/lib/
vdprintf.c
29
SCR
= 7,
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
SDCard.h
107
}
SCR
;
/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/IndustryStandard/
SdCard.h
118
}
SCR
;
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/
SDMediaDevice.h
108
SCR
SCRRegister;
/external/syslinux/com32/libupload/
serial.c
23
SCR
= 7,
/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
core_cm0.h
340
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
408
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
409
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
411
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
412
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
414
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
415
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_cm0plus.h
355
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
429
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
430
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
432
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
433
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
435
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
436
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_sc000.h
346
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
420
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
421
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
423
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
424
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
426
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
427
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_cm3.h
354
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
455
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
456
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
458
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
459
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
461
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
462
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_cm4.h
401
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
494
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
495
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
497
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
498
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
500
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
501
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_sc300.h
354
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
450
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
451
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
453
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
454
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
456
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
457
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
core_cm7.h
416
__IO uint32_t
SCR
; /*!< Offset: 0x010 (R/W) System Control Register */
538
#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB
SCR
: SEVONPEND Position */
539
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB
SCR
: SEVONPEND Mask */
541
#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB
SCR
: SLEEPDEEP Position */
542
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB
SCR
: SLEEPDEEP Mask */
544
#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB
SCR
: SLEEPONEXIT Position */
545
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB
SCR
: SLEEPONEXIT Mask */
[
all
...]
/device/linaro/bootloader/edk2/EmbeddedPkg/Universal/MmcDxe/
Mmc.h
82
UINT8 SCR_STRUCTURE: 4; //
SCR
Structure [63:60]
94
}
SCR
;
MmcIdentification.c
323
SCR
Scr
;
383
/*
SCR
*/
394
CopyMem (&
Scr
, Buffer, 8);
395
if (
Scr
.SD_SPEC == 2) {
396
if (
Scr
.SD_SPEC3 == 1) {
397
if (
Scr
.SD_SPEC4 == 1) {
403
if (
Scr
.SD_SPEC4 == 0) {
410
if ((
Scr
.SD_SPEC3 == 0) && (
Scr
.SD_SPEC4 == 0)) {
[
all
...]
/toolchain/binutils/binutils-2.25/opcodes/
m32r-opinst.c
355
{ INPUT, "
scr
", HW_H_CR, CGEN_MODE_USI, OP_ENT (
SCR
), 0, 0 },
[
all
...]
m32r-opc.c
780
/* mvfc $dr,$
scr
*/
783
{ { MNEM, ' ', OP (DR), ',', OP (
SCR
), 0 } },
[
all
...]
/prebuilts/tools/common/m2/repository/org/eclipse/tycho/tycho-bundles-external/0.18.1/eclipse/plugins/
org.eclipse.equinox.ds_1.4.100.v20130515-2026.jar
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