| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/ |
| reg-prefix.d | 3 #name: SH --allow-reg-prefix option
4 #skip: sh*-*-symbian*
5 # Test SH register names prefixed with $:
7 .*: file format elf.*sh.*
|
| dsp.d | 2 #name: SH DSP basic instructions
4 # Test the SH DSP instructions:
6 .*: +file format .*sh.*
|
| dsp.s | 1 # Test file for SH/GAS -- dsp instructions
|
| fp.s | 4 ! Hitachi SH cc1 (cygnus-2.7.1-950728) arguments: -O -fpeephole
|
| pic.d | 2 #name: SH PIC constructs
3 # Test SH PIC constructs:
5 .*: file format elf.*sh.*
|
| /external/libmtp/ |
| .travis-translate-pkgs | 1 #!/bin/sh
40 for SH in "bash" "busybox sh"; do
43 echo "### SHELL: $SH OS: $os EXTRALIBS: '$EXTRALIBS' ###"
44 env TRAVIS_OS_NAME=$os $SH .travis-before-install $EXTRALIBS
|
| /libcore/ojluni/src/main/native/ |
| zip_util.h | 66 #define SH(b, n) (CH(b, n) | (CH(b, n+1) << 8))
67 #define LG(b, n) ((SH(b, n) | (SH(b, n+2) << 16)) &0xffffffffUL)
74 #define LOCVER(b) SH(b, 4) /* version needed to extract */
75 #define LOCFLG(b) SH(b, 6) /* general purpose bit flags */
76 #define LOCHOW(b) SH(b, 8) /* compression method */
81 #define LOCNAM(b) SH(b, 26) /* filename length */
82 #define LOCEXT(b) SH(b, 28) /* extra field length */
94 #define CENVEM(b) SH(b, 4) /* version made by */
95 #define CENVER(b) SH(b, 6) /* version needed to extract *
[all...] |
| /external/strace/mpers-m32/ |
| struct_ifconf.c | 32 #if defined ALPHA || defined SH || defined SH64
|
| struct_ifreq.c | 32 #if defined ALPHA || defined SH || defined SH64
|
| /external/strace/mpers-mx32/ |
| struct_ifconf.c | 32 #if defined ALPHA || defined SH || defined SH64
|
| struct_ifreq.c | 32 #if defined ALPHA || defined SH || defined SH64
|
| /external/skia/gm/ |
| strokerects.cpp | 20 constexpr SkScalar SH = SkIntToScalar(H);
58 canvas->translate(SW * x, SH * y);
61 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
|
| beziers.cpp | 16 constexpr SkScalar SH = SkIntToScalar(H);
82 canvas->translate(0, SH);
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 38 unsigned char SH = MI->getOperand(2).getImm();
42 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
45 if (SH <= 31 && MB == (32-SH) && ME == 31) {
47 SH = 32-SH;
53 O << ", " << (unsigned int)SH;
71 unsigned char SH = MI->getOperand(2).getImm();
73 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, S
[all...] |
| /external/libcxx/test/std/strings/string.view/string.view.hash/ |
| string_view.pass.cpp | 38 typedef std::hash<String> SH;
45 SH sh; local
52 assert(sh(ss1) == h(s1));
53 assert(sh(ss2) == h(s2));
|
| /external/python/cpython2/Modules/_ctypes/libffi_msvc/ |
| types.c | 61 #elif defined SH
79 #elif defined ARM || defined SH || defined POWERPC_AIX || defined POWERPC_DARWIN
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cfi/ |
| cfi-sh-1.d | 2 #name: CFI on SH
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| barrier.s | 8 dmb sh
20 dsb sh
35 dmb SH
47 dsb SH
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 60 unsigned char SH = MI->getOperand(2).getImm();
64 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
67 if (SH <= 31 && MB == (32-SH) && ME == 31) {
69 SH = 32-SH;
75 O << ", " << (unsigned int)SH;
93 unsigned char SH = MI->getOperand(2).getImm();
95 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, S
[all...] |
| /external/pcre/dist2/ |
| CheckMan | 30 ^\.SH\s\S|
|
| /external/python/cpython2/Modules/_ctypes/libffi_osx/ |
| types.c | 66 #elif defined SH
88 #elif defined ARM || defined SH || defined POWERPC_AIX
|
| /external/strace/ |
| cacheflush.c | 93 #ifdef SH
121 #endif /* SH */
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 88 unsigned &SH, unsigned &MB, unsigned &ME);
332 bool isShiftMask, unsigned &SH,
366 SH = Shift & 31;
390 unsigned Value, SH = 0;
422 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
429 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
435 SH &= 31;
436 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB),
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Analysis/ |
| ScalarEvolutionExpander.h | 123 Value *expandCodeFor(const SCEV *SH, Type *Ty, Instruction *I);
196 Value *expandCodeFor(const SCEV *SH, Type *Ty = 0);
|
| /system/bt/embdrv/sbc/decoder/include/ |
| oi_cpu_dep.h | 66 #define OI_CPU_SH3 4 /**< Hitachi SH-3 processor family */
73 10 /**< Hitachi SH7750 series in SH-4 processor family */
74 #define OI_CPU_SH2 11 /**< Hitachi SH-2 processor family */
155 /* The Hitachi SH C compiler defines _LIT or _BIG, depending on the endianness
159 OI_LITTLE_ENDIAN_BYTE_ORDER /**< If _LIT is defined, SH-3 platform byte \
163 OI_BIG_ENDIAN_BYTE_ORDER /**< If _BIG is defined, SH-3 platform byte \
166 #error SH compiler endianness undefined
175 OI_BIG_ENDIAN_BYTE_ORDER /**< SH-2 platform byte ordering is big-endian. */
|
