| /art/compiler/optimizing/ |
| code_generator_mips.cc | [all...] |
| intrinsics_mips.cc | 834 __ Sltu(TMP, out_lo, TMP);
[all...] |
| code_generator_mips64.cc | [all...] |
| intrinsics_mips64.cc | [all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.cc | 963 void MacroAssembler::Sltu(Register rd, Register rs, const Operand& rt) {
965 sltu(rd, rs, rt.rm());
978 sltu(rd, rs, at);
[all...] |
| macro-assembler-mips.h | 634 DEFINE_INSTRUCTION(Sltu);
[all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.cc | 1097 void MacroAssembler::Sltu(Register rd, Register rs, const Operand& rt) {
1099 sltu(rd, rs, rt.rm());
1112 sltu(rd, rs, at);
[all...] |
| macro-assembler-mips64.h | 667 DEFINE_INSTRUCTION(Sltu);
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceInstMIPS32.h | 266 Sltu,
[all...] |
| /external/v8/src/compiler/mips/ |
| code-generator-mips.cc | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips_test.cc | 504 TEST_F(AssemblerMIPSTest, Sltu) {
505 DriverStr(RepeatRRR(&mips::MipsAssembler::Sltu, "sltu ${reg1}, ${reg2}, ${reg3}"), "Sltu");
[all...] |
| assembler_mips.h | 299 void Sltu(Register rd, Register rs, Register rt);
[all...] |
| assembler_mips.cc | 893 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
[all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64_test.cc | [all...] |
| assembler_mips64.h | 533 void Sltu(GpuRegister rd, GpuRegister rs, GpuRegister rt);
[all...] |
| assembler_mips64.cc | 645 void Mips64Assembler::Sltu(GpuRegister rd, GpuRegister rs, GpuRegister rt) {
[all...] |
