| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | [all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceInstARM32.h | 424 Udiv,
[all...] |
| IceTargetLoweringARM32.cpp | 467 case InstArithmetic::Udiv:
485 case InstArithmetic::Udiv:
517 case InstArithmetic::Udiv:
[all...] |
| IceConverter.cpp | 282 case Instruction::UDiv:
283 return convertArithInstruction(Instr, Ice::InstArithmetic::Udiv);
[all...] |
| IceTargetLoweringX86BaseImpl.h | 659 // mul, udiv, urem, sdiv, srem, frem
[all...] |
| IceTargetLoweringMIPS32.cpp | 374 case InstArithmetic::Udiv:
[all...] |
| WasmTranslator.cpp | 442 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Udiv,
[all...] |
| IceInstARM32.cpp | 658 Asm->udiv(getDest(), getSrc(0), getSrc(1), getPredicate());
[all...] |
| PNaClTranslator.cpp | [all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 1193 void MacroAssembler::Udiv(const Register& rd,
1198 udiv(rd, rn, rm);
[all...] |
| macro-assembler-arm64.h | 558 inline void Udiv(const Register& rd, const Register& rn, const Register& rm);
[all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | [all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.h | [all...] |
| /external/vixl/test/aarch32/ |
| test-simulator-cond-rd-rn-rm-a32.cc | 145 M(Udiv) \
[all...] |
| test-simulator-cond-rd-rn-rm-t32.cc | 144 M(Udiv) \
[all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| /external/swiftshader/src/Reactor/ |
| SubzeroReactor.cpp | 740 return createArithmetic(Ice::InstArithmetic::Udiv, lhs, rhs);
[all...] |
