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Searched
refs:VLIW
(Results
1 - 19
of
19
) sorted by null
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/frv/
fr450-media-issue.l
2
.*:5: Error:
VLIW
packing constraint violation
3
.*:9: Error:
VLIW
packing constraint violation
4
.*:13: Error:
VLIW
packing constraint violation
6
.*:17: Error:
VLIW
packing constraint violation
7
.*:19: Error:
VLIW
packing constraint violation
8
.*:21: Error:
VLIW
packing constraint violation
9
.*:23: Error:
VLIW
packing constraint violation
10
.*:25: Error:
VLIW
packing constraint violation
11
.*:27: Error:
VLIW
packing constraint violation
13
.*:33: Error:
VLIW
packing constraint violatio
[
all
...]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/
inst.s
18
#
VLIW
syntax test
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/
guard-debug.s
2
# On the D30V, assembling with -g should disable the
VLIW
packing
inst.s
490
#
VLIW
syntax test
/toolchain/binutils/binutils-2.25/gas/config/
tc-mep.h
93
/* Support for core/
vliw
mode switching. */
95
#define
VLIW
1
tc-mep.c
82
{ "
vliw
", mep_switch_to_vliw_mode, 0 },
617
as_bad (_("
vliw
group must consist of 1 core and 1 copro insn."));
638
to form a valid
vliw
insn combination. In this case, we
754
as_bad (_("
vliw
group must consist of 1 core and 1 copro insn."));
775
to form a valid
vliw
insn combination. In this case, we
911
/* IVC2 packing is different than other
VLIW
coprocessors. Many of
928
/*
VLIW
modes:
[
all
...]
/prebuilts/go/darwin-x86/src/debug/dwarf/
line.go
55
// OpIndex is the index of an operation within a
VLIW
57
// non-
VLIW
architectures, it will always be 0. Address and
/prebuilts/go/linux-x86/src/debug/dwarf/
line.go
55
// OpIndex is the index of an operation within a
VLIW
57
// non-
VLIW
architectures, it will always be 0. Address and
/external/llvm/include/llvm/Target/
TargetLowering.h
76
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
93
VLIW
// Scheduling for
VLIW
targets.
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGISel.cpp
315
if (TLI->getSchedulingPreference() == Sched::
VLIW
)
[
all
...]
/external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp
[
all
...]
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