| /external/mesa3d/src/mesa/x86/ |
| sse_xform3.S | 77 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
92 MULPS ( XMM0, XMM4 ) /* m3*ox | m2*ox | m1*ox | m0*ox */
150 MOVLPS ( S(0), XMM0 )
151 MOVLPS ( XMM0, D(0) )
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
201 XORPS( XMM0, XMM0 ) /* clean the working register */
214 MOVLPS ( S(0), XMM0 ) /* - | - | s1 | s0 */
215 MULPS ( XMM1, XMM0 ) /* - | - | s1*m5 | s0*m0 *
[all...] |
| sse_normal.S | 79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
80 SHUFPS ( CONST(0x0), XMM0, XMM0 ) /* scale | scale */
81 MULPS ( XMM0, XMM1 ) /* m5*scale | m0*scale */
82 MULSS ( M(10), XMM0 ) /* m10*scale */
91 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */
138 MOVSS ( M(0), XMM0 ) /* m0 */
140 UNPCKLPS( XMM1, XMM0 ) /* m4 | m0 */
145 MULPS ( XMM4, XMM0 ) /* m4*scale | m0*scale */
164 MULPS ( XMM0, XMM3 ) /* ux*m4 | ux*m0 *
[all...] |
| sse_xform4.S | 78 MOVSS( SRC(0), XMM0 ) /* ox */
79 SHUFPS( CONST(0x0), XMM0, XMM0 ) /* ox | ox | ox | ox */
80 MULPS( XMM4, XMM0 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
94 ADDPS( XMM1, XMM0 ) /* ox*m3+oy*m7 | ... */
95 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */
96 ADDPS( XMM3, XMM0 ) /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */
97 MOVAPS( XMM0, DST(0) ) /* ->D(3) | ->D(2) | ->D(1) | ->D(0) */
143 MOVAPS( MAT(0), XMM0 ) /* m3 | m2 | m1 | m0 */
152 MULPS( XMM0, XMM4 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 *
[all...] |
| sse_xform1.S | 77 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
186 MOVSS( M(0), XMM0 ) /* m0 */
194 MULSS( XMM0, XMM4 ) /* ox*m0 */
247 XORPS( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 */
258 MOVSS( XMM0, D(1) )
259 MOVSS( XMM0, D(3) )
305 MOVLPS( M(0), XMM0 ) /* m1 | m0 */
312 MULPS( XMM0, XMM2 ) /* - | - | ox*m1 | ox*m0 *
[all...] |
| common_x86_asm.S | 168 XORPS ( XMM0, XMM0 )
197 XORPS ( XMM0, XMM0 )
206 DIVPS ( XMM0, XMM1 )
|
| sse_xform2.S | 76 MOVAPS( M(0), XMM0 ) /* m3 | m2 | m1 | m0 */
84 MULPS( XMM0, XMM3 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */
189 XORPS( XMM0, XMM0 ) /* clean the working register */
200 MOVLPS ( S(0), XMM0 ) /* - | - | oy | ox */
201 MULPS ( XMM1, XMM0 ) /* - | - | oy*m5 | ox*m0 */
202 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */
203 MOVLPS ( XMM0, D(0) ) /* -> D(1) | -> D(0) */
255 XORPS ( XMM0, XMM0 ) /* 0 | 0 | 0 | 0 *
[all...] |
| /art/runtime/arch/x86_64/ |
| registers_x86_64.cc | 38 if (rhs >= XMM0 && rhs <= XMM15) {
|
| registers_x86_64.h | 53 XMM0 = 0,
|
| quick_method_frame_info_x86_64.h | 44 (1 << art::x86_64::XMM0) | (1 << art::x86_64::XMM1) | (1 << art::x86_64::XMM2) |
51 (1 << art::x86_64::XMM0) | (1 << art::x86_64::XMM1) |
|
| context_x86_64.cc | 75 fprs_[XMM0] = nullptr;
|
| /art/runtime/arch/x86/ |
| quick_method_frame_info_x86.h | 31 XMM0 = 0,
51 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
54 (1 << art::x86::XMM0) | (1 << art::x86::XMM1) |
|
| /art/compiler/utils/x86/ |
| assembler_x86_test.cc | 73 new x86::XmmRegister(x86::XMM0),
126 GetAssembler()->LoadLongConstant(x86::XMM0, 51);
130 "movsd 0(%esp), %xmm0\n"
334 GetAssembler()->comiss(x86::XmmRegister(x86::XMM0), x86::Address(x86::EAX, 0));
335 const char* expected = "comiss 0(%EAX), %xmm0\n";
340 GetAssembler()->ucomiss(x86::XmmRegister(x86::XMM0), x86::Address(x86::EAX, 0));
341 const char* expected = "ucomiss 0(%EAX), %xmm0\n";
346 GetAssembler()->comisd(x86::XmmRegister(x86::XMM0), x86::Address(x86::EAX, 0));
347 const char* expected = "comisd 0(%EAX), %xmm0\n";
352 GetAssembler()->ucomisd(x86::XmmRegister(x86::XMM0), x86::Address(x86::EAX, 0))
[all...] |
| managed_register_x86_test.cc | 65 X86ManagedRegister reg = X86ManagedRegister::FromXmmRegister(XMM0);
71 EXPECT_EQ(XMM0, reg.AsXmmRegister());
213 EXPECT_TRUE(!reg_eax.Equals(X86ManagedRegister::FromXmmRegister(XMM0)));
220 X86ManagedRegister reg_xmm0 = X86ManagedRegister::FromXmmRegister(XMM0);
224 EXPECT_TRUE(reg_xmm0.Equals(X86ManagedRegister::FromXmmRegister(XMM0)));
235 EXPECT_TRUE(!reg_st0.Equals(X86ManagedRegister::FromXmmRegister(XMM0)));
246 EXPECT_TRUE(!reg_pair.Equals(X86ManagedRegister::FromXmmRegister(XMM0)));
259 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromXmmRegister(XMM0)));
270 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromXmmRegister(XMM0)));
281 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromXmmRegister(XMM0)));
[all...] |
| constants_x86.h | 44 XMM0 = 0,
|
| /art/compiler/utils/x86_64/ |
| managed_register_x86_64_test.cc | 65 X86_64ManagedRegister reg = X86_64ManagedRegister::FromXmmRegister(XMM0);
71 EXPECT_EQ(XMM0, reg.AsXmmRegister());
213 EXPECT_TRUE(!reg_eax.Equals(X86_64ManagedRegister::FromXmmRegister(XMM0)));
220 X86_64ManagedRegister reg_xmm0 = X86_64ManagedRegister::FromXmmRegister(XMM0);
224 EXPECT_TRUE(reg_xmm0.Equals(X86_64ManagedRegister::FromXmmRegister(XMM0)));
235 EXPECT_TRUE(!reg_st0.Equals(X86_64ManagedRegister::FromXmmRegister(XMM0)));
246 EXPECT_TRUE(!reg_pair.Equals(X86_64ManagedRegister::FromXmmRegister(XMM0)));
259 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromXmmRegister(XMM0)));
270 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromXmmRegister(XMM0)));
281 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromXmmRegister(XMM0)));
[all...] |
| assembler_x86_64_test.cc | 215 fp_registers_.push_back(new x86_64::XmmRegister(x86_64::XMM0));
838 GetAssembler()->cvtsi2ss(x86_64::XmmRegister(x86_64::XMM0),
841 GetAssembler()->cvtsi2ss(x86_64::XmmRegister(x86_64::XMM0),
844 const char* expected = "cvtsi2ss 0(%RAX), %xmm0\n"
845 "cvtsi2ssq 0(%RAX), %xmm0\n";
850 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0),
853 GetAssembler()->cvtsi2sd(x86_64::XmmRegister(x86_64::XMM0)
[all...] |
| /art/compiler/jni/quick/x86_64/ |
| calling_convention_x86_64.cc | 31 // XMM0..XMM7 can be used to pass the first 8 floating args. The rest must go on the stack.
94 return X86_64ManagedRegister::FromXmmRegister(XMM0);
142 // First eight float parameters are passed via XMM0..XMM7
144 static_cast<FloatRegister>(XMM0 + itr_float_and_doubles_));
251 // First eight float parameters are passed via XMM0..XMM7
253 static_cast<FloatRegister>(XMM0 + itr_float_and_doubles_));
263 // Float arguments passed through Xmm0..Xmm7
283 // Float arguments passed through Xmm0..Xmm7
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 242 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM15);
245 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM15);
251 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM15);
258 return isMem64() && isMemIndexReg(X86::XMM0, X86::XMM31);
261 return isMem128() && isMemIndexReg(X86::XMM0, X86::XMM31);
267 return isMem256() && isMemIndexReg(X86::XMM0, X86::XMM31);
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/X64/ |
| SmmInit.asm | 66 ; Accoring to X64 calling convention, XMM0~5 are volatile, we need to save
70 movdqa [rsp], xmm0
82 ; Restore XMM0~5 after calling C-function.
84 movdqa xmm0, [rsp]
|
| /art/compiler/jni/quick/x86/ |
| calling_convention_x86.cc | 70 return X86ManagedRegister::FromXmmRegister(XMM0);
127 // First four float parameters are passed via XMM0..XMM3
129 static_cast<XmmRegister>(XMM0 + itr_float_and_doubles_));
|
| /art/compiler/optimizing/ |
| code_generator_x86.h | 40 static constexpr XmmRegister kParameterFpuRegisters[] = { XMM0, XMM1, XMM2, XMM3 };
46 static constexpr XmmRegister kRuntimeParameterFpuRegisters[] = { XMM0, XMM1, XMM2, XMM3 };
121 return Location::FpuRegisterLocation(XMM0);
|
| code_generator_x86_64.h | 38 { XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7 };
46 static constexpr FloatRegister kRuntimeParameterFpuRegisters[] = { XMM0, XMM1 };
102 return Location::FpuRegisterLocation(XMM0);
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 501 for (MCRegAliasIterator AI(X86::XMM0 + n, this, true); AI.isValid(); ++AI)
672 if (Reg >= X86::XMM0 && Reg <= X86::XMM31)
673 return X86::ZMM0 + (Reg - X86::XMM0);
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 230 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
|
| X86DisassemblerDecoder.h | 207 ENTRY(XMM0) \
|
