/external/vixl/src/aarch32/ |
label-aarch32.cc | 28 #include "label-aarch32.h" 29 #include "macro-assembler-aarch32.h" 32 namespace aarch32 { namespace in namespace:vixl 50 } // namespace aarch32
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constants-aarch32.cc | 29 #include "aarch32/constants-aarch32.h" 32 namespace aarch32 { namespace in namespace:vixl 854 } // namespace aarch32
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label-aarch32.h | 41 #include "constants-aarch32.h" 44 namespace aarch32 { namespace in namespace:vixl 365 } // namespace aarch32
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/external/vixl/test/ |
test-operands.cc | 33 #include "aarch32/operands-aarch32.h" 44 aarch32::Operand op = aarch32::Operand::From(42); 50 aarch32::Operand op = aarch32::Operand::From(-42); 58 aarch32::Operand op = aarch32::Operand::From(-1); 64 aarch32::Operand op = aarch32::Operand::From(UINT32_MAX) [all...] |
test-code-generation-scopes.cc | 30 #include "aarch32/macro-assembler-aarch32.h" 54 aarch32::MacroAssembler masm; 57 CodeBufferCheckScope scope(&masm, aarch32::kA32InstructionSizeInBytes); 58 __ Mov(aarch32::r0, 0); 82 aarch32::MacroAssembler masm; 85 CodeBufferCheckScope scope(&masm, 2 * aarch32::kA32InstructionSizeInBytes); 86 __ Mov(aarch32::r0, 0); 87 __ mov(aarch32::r1, 1); 112 aarch32::MacroAssembler masm [all...] |
test-use-scratch-register-scope.cc | 32 #include "aarch32/macro-assembler-aarch32.h" 42 namespace aarch32 { \ 45 void Test_##Name##_AArch32() { aarch32::Test_##Name##_AArch32_Impl(); } \ 48 void aarch32::Test_##Name##_AArch32_Impl()
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/art/compiler/optimizing/ |
common_arm.h | 29 #include "aarch32/macro-assembler-aarch32.h" 39 static_assert(vixl::aarch32::kSpCode == SP, "vixl::aarch32::kSpCode must equal ART's SP"); 41 inline dwarf::Reg DWARFReg(vixl::aarch32::Register reg) { 45 inline dwarf::Reg DWARFReg(vixl::aarch32::SRegister reg) { 49 inline vixl::aarch32::Register HighRegisterFrom(Location location) { 51 return vixl::aarch32::Register(location.AsRegisterPairHigh<vixl::aarch32::Register>()); 54 inline vixl::aarch32::DRegister HighDRegisterFrom(Location location) [all...] |
code_generator_arm_vixl.h | 33 #include "aarch32/constants-aarch32.h" 34 #include "aarch32/instructions-aarch32.h" 35 #include "aarch32/macro-assembler-aarch32.h" 44 15 * vixl::aarch32::kMaxInstructionSizeInBytes; 46 static const vixl::aarch32::Register kParameterCoreRegistersVIXL[] = { 47 vixl::aarch32::r1, 48 vixl::aarch32::r2 [all...] |
optimizing_cfi_test.cc | 33 namespace vixl32 = vixl::aarch32;
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/external/vixl/tools/ |
generate_tests.py | 45 - test/aarch32/test-assembler-cond-rd-rn-immediate-a32.cc 46 - test/aarch32/test-assembler-cond-rd-rn-rm-a32.cc 47 - test/aarch32/test-assembler-cond-rd-rn-rm-q-a32.cc 48 - test/aarch32/test-assembler-cond-rd-rn-rm-ge-a32.cc 51 generated dummy trace files in `test/aarch32/traces/`. If you look at them 54 $ cat test/aarch32/traces/sim-cond-rd-rn-immediate-adc-a32.h 69 --aarch32-only 81 generates tests according to them. These files live in `test/aarch32/config` by 88 test/aarch32/config/cond-rd-rn-immediate-a32.json 89 `-> test/aarch32/test-simulator-cond-rd-rn-immediate-a32.c [all...] |
/art/compiler/utils/arm/ |
managed_register_arm.h | 28 #include "aarch32/macro-assembler-aarch32.h" 99 vixl::aarch32::Register AsVIXLRegister() const { 101 return vixl::aarch32::Register(id_); 109 vixl::aarch32::SRegister AsVIXLSRegister() const { 111 return vixl::aarch32::SRegister(id_ - kNumberOfCoreRegIds); 119 vixl::aarch32::DRegister AsVIXLDRegister() const { 121 return vixl::aarch32::DRegister(id_ - kNumberOfCoreRegIds - kNumberOfSRegIds); 152 vixl::aarch32::Register AsVIXLRegisterPairLow() const { 153 return vixl::aarch32::Register(AsRegisterPairLow()) [all...] |
assembler_arm_vixl.h | 32 #include "aarch32/macro-assembler-aarch32.h" 35 namespace vixl32 = vixl::aarch32; 229 vixl::aarch32::Literal<T>* CreateLiteralDestroyedWithPool(T value) { 230 vixl::aarch32::Literal<T>* literal = 231 new vixl::aarch32::Literal<T>(value,
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assembler_arm_vixl.cc | 26 using namespace vixl::aarch32; // NOLINT(build/namespaces) 63 void ArmVIXLAssembler::PoisonHeapReference(vixl::aarch32::Register reg) { 68 void ArmVIXLAssembler::UnpoisonHeapReference(vixl::aarch32::Register reg) {
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/art/disassembler/ |
disassembler_arm.cc | 29 #include "aarch32/instructions-aarch32.h" 30 #include "aarch32/disasm-aarch32.h" 36 using vixl::aarch32::MemOperand; 37 using vixl::aarch32::PrintDisassembler; 38 using vixl::aarch32::pc; 40 static const vixl::aarch32::Register tr(TR); 78 DisassemblerStream& operator<<(vixl::aarch32::Register reg) OVERRIDE { 101 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) OVERRIDE [all...] |
/art/compiler/linker/arm/ |
relative_patcher_thumb2.cc | 181 vixl::aarch32::Register base_reg, 182 vixl::aarch32::MemOperand& lock_word, 183 vixl::aarch32::Label* slow_path, 185 using namespace vixl::aarch32; // NOLINT(build/namespaces) 204 vixl::aarch32::Register entrypoint) { 205 using vixl::aarch32::MemOperand; 206 using vixl::aarch32::ip; 208 const vixl::aarch32::Register tr = vixl::aarch32::r9; 222 using namespace vixl::aarch32; // NOLINT(build/namespaces [all...] |
/external/vixl/examples/aarch32/ |
custom-aarch32-disasm.cc | 31 #include "aarch32/constants-aarch32.h" 32 #include "aarch32/instructions-aarch32.h" 33 #include "aarch32/macro-assembler-aarch32.h" 34 #include "aarch32/disasm-aarch32.h" 39 namespace aarch32 { namespace in namespace:vixl 143 } // namespace aarch32 [all...] |
examples.h | 40 #include "aarch32/constants-aarch32.h" 41 #include "aarch32/instructions-aarch32.h" 42 #include "aarch32/macro-assembler-aarch32.h" 45 using namespace vixl::aarch32; 96 // This is the example used in doc/getting-started-aarch32.md
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/external/vixl/benchmarks/aarch32/ |
bench-branch-link-masm.cc | 31 #include "aarch32/constants-aarch32.h" 32 #include "aarch32/instructions-aarch32.h" 33 #include "aarch32/macro-assembler-aarch32.h" 36 using namespace vixl::aarch32;
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bench-branch-masm.cc | 31 #include "aarch32/constants-aarch32.h" 32 #include "aarch32/instructions-aarch32.h" 33 #include "aarch32/macro-assembler-aarch32.h" 36 using namespace vixl::aarch32;
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bench-dataop.cc | 31 #include "aarch32/constants-aarch32.h" 32 #include "aarch32/instructions-aarch32.h" 33 #include "aarch32/macro-assembler-aarch32.h" 36 using namespace vixl::aarch32;
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/art/compiler/trampolines/ |
trampoline_compiler.cc | 61 using vixl::aarch32::MemOperand; 62 using vixl::aarch32::pc; 63 using vixl::aarch32::r0; 71 vixl::aarch32::UseScratchRegisterScope temps(assembler.GetVIXLAssembler()); 72 const vixl::aarch32::Register temp_reg = temps.Acquire();
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/art/compiler/utils/ |
assembler_thumb_test.cc | 306 #define R0 vixl::aarch32::r0 307 #define R2 vixl::aarch32::r2 308 #define R4 vixl::aarch32::r4 309 #define R12 vixl::aarch32::r12 333 vixl::aarch32::UseScratchRegisterScope temps(assembler.asm_.GetVIXLAssembler()); 366 vixl::aarch32::UseScratchRegisterScope temps(assembler.asm_.GetVIXLAssembler());
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/external/vixl/test/aarch32/ |
test-utils-aarch32.h | 31 #include "aarch32/constants-aarch32.h" 32 #include "aarch32/instructions-aarch32.h" 33 #include "aarch32/macro-assembler-aarch32.h" 36 namespace aarch32 { namespace in namespace:vixl 188 } // namespace aarch32
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test-utils-aarch32.cc | 27 #include "aarch32/test-utils-aarch32.h" 32 namespace aarch32 { namespace in namespace:vixl 261 } // namespace aarch32
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/external/vixl/tools/test_generator/ |
generator.py | 486 #include "aarch32/traces/sim-...-a32.h" 487 #include "aarch32/traces/sim-...-a32.h" 493 "#include \"aarch32/traces/" + self.GetTraceFileName(mnemonic) + "\"\n"
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