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  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-nios2/
u16.s 9 andi r1, r1, some_sym
10 andi r1, r1, min
11 andi r1, r1, max
12 andi r1, r1, some_sym + some_other_sym + 1
13 andi r1, r1, some_sym - some_other_sym + 1
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mt/
badunsignedimmlow.s 3 andi R1,R2,#-1 label
badunsignedimmhigh.s 3 andi R1,R2,#$10000 label
allinsn.s 42 .global andi
43 andi: label
44 andi R0,R0,#0
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/
and.s 1 # Source file used to test the and, andhi and andi instructions
5 andi r4,r4,0x7fff
6 andi r4,r4,0x8000
7 andi r4,r4,0xffff
8 andi r4,r4,0x0
and.d 10 0+0004 <[^>]*> 211fffcc andi r4,r4,32767
11 0+0008 <[^>]*> 2120000c andi r4,r4,32768
12 0+000c <[^>]*> 213fffcc andi r4,r4,65535
13 0+0010 <[^>]*> 2100000c andi r4,r4,0
movi.s 19 andi r2, r15, 0xffff0000 label
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/
to-16bit-v3.s 2 andi $r0, $r0, 1 label
3 andi $r7, $r7, 255 label
  /external/valgrind/none/tests/mips64/
logical_instructions.stdout.exp     [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/v850/
logical.s 6 andi 7,r5,r6
  /system/core/libpixelflinger/arch-mips/
col32cb16blend.S 34 andi $t4, 0x1f
39 andi $t5, 0x3f
44 andi $t6, 0x1f
58 andi \dreg, 0xffff
81 andi $a3, 0x1f /* sR */
83 andi $t0, 0x3f /* sG */
85 andi $t1, 0x1f /* sB */
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
and.d 10 0+0000 <[^>]*> andi a0,a0,0x0
11 0+0004 <[^>]*> andi a0,a0,0x1
12 0+0008 <[^>]*> andi a0,a0,0x8000
r5900-full.s 25 andi $31, $0, 0
26 andi $1, $10, 3
27 andi $0, $31, 0xFFFF
r5900.s 25 andi $31, $0, 0
26 andi $1, $10, 3
27 andi $0, $31, 0xFFFF
micromips@and.d 11 [0-9a-f]+ <[^>]*> d084 0000 andi a0,a0,0x0
12 [0-9a-f]+ <[^>]*> d084 0001 andi a0,a0,0x1
13 [0-9a-f]+ <[^>]*> d084 8000 andi a0,a0,0x8000
  /frameworks/native/opengl/libagl/arch-mips/
fixed_asm.S 36 andi $t1,$t1,0xff /* get the e */
46 andi $t4,$v0,0x1
  /external/llvm/test/MC/Mips/msa/
test_i8.s 3 # CHECK: andi.b $w2, $w29, 48 # encoding: [0x78,0x30,0xe8,0x80]
14 andi.b $w2, $w29, 48
  /bionic/libc/arch-mips/string/
strncmp.S 133 andi t1, a1, (NSIZE - 1)
167 andi t0, a0, (NSIZE - 1)
170 andi t0, a0, (NSIZE - 1)
279 andi t0, t0, 0xff; \
281 andi t1, t1, 0xff; \
286 andi t8, t8, 0xff; \
288 andi t9, t9, 0xff; \
317 andi t0, v0, 0xff
319 andi t1, v1, 0xff
354 andi t8, v0, 0xf
    [all...]
strcmp.S 129 andi t1, a1, (NSIZE - 1)
156 andi t2, a0, (NSIZE - 1) #check if a0 aligned
247 andi t0, t0, 0xff; \
249 andi t1, t1, 0xff; \
254 andi t8, t8, 0xff; \
256 andi t9, t9, 0xff; \
285 andi t0, v0, 0xff
287 andi t1, v1, 0xff
322 andi t8, v0, 0xff
323 andi t9, v1, 0xf
    [all...]
memset.S 274 andi t2,a3,(NSIZE-1) /* word-unaligned address? */
280 andi t2,a0,(NSIZE-1)
323 andi t2,a3,4
336 andi t8,a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
397 andi t8,a2,NSIZEMASK /* is there a 32-byte/64-byte chunk. */
417 andi a2,t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
  /external/v8/src/ppc/
codegen-ppc.cc 89 __ andi(r0, result, Operand(kIsIndirectStringMask));
94 __ andi(ip, result, Operand(kStringRepresentationMask));
131 __ andi(r0, result, Operand(kStringRepresentationMask));
145 __ andi(r0, result, Operand(kIsIndirectStringMask));
150 __ andi(r0, result, Operand(kShortExternalStringMask));
158 __ andi(r0, result, Operand(kStringEncodingMask));
  /art/runtime/interpreter/mterp/mips/
op_shl_long_2addr.S 15 andi v1, a2, 0x20 # shift< shift & 0x20
op_shr_long_2addr.S 14 andi v0, a2, 0x20 # shift & 0x20
op_ushr_long_2addr.S 15 andi v0, a2, 0x20 # shift & 0x20
  /external/v8/src/ic/mips/
ic-mips.cc 40 // If the instruction following the call is not a andi at, rx, #yyy, nothing
53 // If the instruction following the call is not a andi at, rx, #yyy, nothing
65 // If the delta is 0 the instruction is andi at, zero_reg, #0 which also
80 // andi at, rx, 0
83 // andi at, rx, #kSmiTagMask
91 patcher.masm()->andi(at, reg, kSmiTagMask);
95 patcher.masm()->andi(at, reg, 0);

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