| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| relax.s | 26 bgtzl $3, bar
54 bgtzl $3, foo
|
| micromips-branch-relax.s | 127 bgtzl $3, test3
|
| relax-at.d | 134 00000170 <foo\+0x170> bgtzl v1,00000180 <foo\+0x180>
327 000203c0 <bar\+0x170> bgtzl v1,000203d0 <bar\+0x180>
|
| relax.d | 133 00000170 <foo\+0x170> bgtzl v1,00000180 <foo\+0x180>
326 000203c0 <bar\+0x170> bgtzl v1,000203d0 <bar\+0x180>
|
| r6-removed.l | 26 .*:27: Error: opcode not supported on this processor: .* \(.*\) `bgtzl \$28,1f'
|
| r6-removed.s | 27 bgtzl $28,1f
|
| /external/valgrind/none/tests/mips32/ |
| branches.stdout.exp | 297 BGTZL
298 bgtzl :: 6, RSval: 0
299 bgtzl :: 5, RSval: 1
300 bgtzl :: 8, RSval: -1
301 bgtzl :: 9, RSval: -1
302 bgtzl :: 10, RSval: -2
303 bgtzl :: 11, RSval: -1
304 bgtzl :: 10, RSval: 5
305 bgtzl :: 13, RSval: -3
306 bgtzl :: 12, RSval: 12
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips-jump-delay-slots.s | 83 # CHECK: bgtzl $6, 1332
85 bgtzl $6,1332
|
| /external/valgrind/none/tests/mips64/ |
| branches.stdout.exp | 314 --- BGTZL --- if RSval > 0 then out = RDval + 4 else out = RDval + 6
315 bgtzl :: out: 6, RDval: 0, RSval: 0
316 bgtzl :: out: 5, RDval: 1, RSval: 1
317 bgtzl :: out: 8, RDval: 2, RSval: -1
318 bgtzl :: out: 9, RDval: 3, RSval: -1
319 bgtzl :: out: 10, RDval: 4, RSval: -2
320 bgtzl :: out: 11, RDval: 5, RSval: -1
321 bgtzl :: out: 10, RDval: 6, RSval: 5
322 bgtzl :: out: 13, RDval: 7, RSval: -3
323 bgtzl :: out: 12, RDval: 8, RSval: 12
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/iq2000/ |
| allinsn.s | 174 .global bgtzl
175 bgtzl: label
176 bgtzl %0,footext
|
| allinsn.d | 135 000000a8 <bgtzl>:
136 a8: 5c 00 ff d5 bgtzl r0,0 <add>
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips2.s | 16 bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips2.s | 18 bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 15 bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 34 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 34 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 38 bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
|
