| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips-branch-delay.s | 22 bltzall $2, .
24 bltzall $2, .
26 bltzall $2, .
28 bltzall $2, .
47 bltzall $2, .
49 bltzall $2, .
51 bltzall $2, .
53 bltzall $2, .
72 bltzall $2, .
74 bltzall $2,
[all...] |
| bltzal.s | 6 bltzall $31, test
|
| micromips-size-1.s | 79 bltzall $2, bar
81 bltzall $2, bar
83 bltzall $2, bar
85 bltzall $2, bar
87 bltzall $2, bar
89 bltzall $2, bar
91 bltzall $2, bar
|
| micromips-size-0.s | 95 bltzall $2, bar
97 bltzall $2, bar
99 bltzall $2, bar
101 bltzall $2, bar
103 bltzall $2, bar
105 bltzall $2, bar
107 bltzall $2, bar
109 bltzall $2, bar
111 bltzall $2, bar
|
| relax.s | 32 bltzall $2, bar
60 bltzall $2, foo
|
| micromips-branch-relax.s | 147 bltzall $3, test3
|
| r6-removed.s | 30 bltzall $28,1f
|
| /external/llvm/test/MC/Mips/ |
| mips-jump-delay-slots.s | 95 # CHECK: bltzall $6, 1332
97 bltzall $6,1332
|
| /external/valgrind/none/tests/mips64/ |
| branches.stdout.exp | 280 --- BLTZALL --- if RSval < 0 then out = RDval + 4 else out = RDval + 6
281 bltzall :: out: 6, RDval: 0, RSval: 0
282 bltzall :: out: 7, RDval: 1, RSval: 1
283 bltzall :: out: 6, RDval: 2, RSval: -1
284 bltzall :: out: 7, RDval: 3, RSval: -1
285 bltzall :: out: 8, RDval: 4, RSval: -2
286 bltzall :: out: 9, RDval: 5, RSval: -1
287 bltzall :: out: 12, RDval: 6, RSval: 5
288 bltzall :: out: 11, RDval: 7, RSval: -3
289 bltzall :: out: 14, RDval: 8, RSval: 12
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/iq2000/ |
| allinsn.s | 198 .global bltzall
199 bltzall: label
200 bltzall %0,footext
|
| allinsn.d | 153 000000c0 <bltzall>:
154 c0: 04 12 ff cf bltzall r0,0 <add>
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips2.s | 20 bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips2.s | 21 bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips2.s | 17 bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 36 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 36 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 40 bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
|
