| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_screen.h | 82 uint32_t bo_size; member in struct:vc4_screen::vc4_bo_cache
89 uint32_t bo_size; member in struct:vc4_screen
|
| vc4_bufmgr.c | 57 fprintf(stderr, " BOs size: %dkb\n", screen->bo_size / 1024);
59 fprintf(stderr, " BOs cached size: %dkb\n", cache->bo_size / 1024);
87 cache->bo_size -= bo->size;
175 screen->bo_size += bo->size;
219 screen->bo_size -= bo->size;
305 cache->bo_size += bo->size;
443 screen->bo_size += bo->size;
|
| /device/asus/fugu/kernel-headers/drm/ |
| psb_ttm_placement_user.h | 51 uint64_t bo_size; member in struct:ttm_pl_rep
|
| /device/asus/fugu/original-kernel-headers/drm/ |
| psb_ttm_placement_user.h | 87 * @bo_size: Actual buffer object size.
106 uint64_t bo_size; member in struct:ttm_pl_rep
|
| /external/mesa3d/src/gallium/drivers/ilo/ |
| ilo_resource.h | 109 uint32_t bo_size; member in struct:ilo_buffer_resource
|
| ilo_resource.c | 602 bo = intel_winsys_alloc_bo(is->dev.winsys, name, buf->bo_size, cpu_init);
641 * vertex, and buf->bo_size is 6. The hardware would fail to fetch it at
660 buf->bo_size = size;
661 ilo_vma_init(&buf->vma, &is->dev, buf->bo_size, 4096);
663 if (buf->bo_size < templ->width0 || buf->bo_size > ilo_max_resource_size ||
|
| ilo_draw.c | 157 unsigned bo_size; local
187 bo_size = (q->stride > 4096) ? q->stride : 4096;
188 q->bo = intel_winsys_alloc_bo(ilo->winsys, "query", bo_size, false);
192 q->count = bo_size / q->stride;
|
| /external/mesa3d/src/gallium/drivers/nouveau/ |
| nouveau_context.h | 50 unsigned bo_size; member in struct:nouveau_context::__anon27774
|
| nouveau_buffer.c | 954 if ((size > nv->scratch.bo_size) || (i == nv->scratch.wrap))
960 ret = nouveau_scratch_bo_alloc(nv, &bo, nv->scratch.bo_size);
967 nv->scratch.end = nv->scratch.bo_size;
[all...] |
| /external/libdrm/radeon/ |
| radeon_surface.h | 127 uint64_t bo_size; member in struct:radeon_surface
|
| radeon_surface.c | 197 surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;
295 offset = surf->bo_size;
323 offset = surf->bo_size;
356 offset = surf->bo_size;
399 offset = surf->bo_size;
611 surf->bo_size = offset + surflevel->slice_size * surflevel->nblk_z * surf->array_size;
647 offset = surf->bo_size;
700 offset = surf->bo_size;
807 surf->bo_size, 0);
830 surf->stencil_tile_split, surf->bo_size, 0)
[all...] |
| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_surface.c | 203 surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign);
235 surf->bo_size = surf_level->offset + AddrSurfInfoOut->surfSize;
455 surf->bo_size = 0;
519 surf->dcc_size = align64(surf->bo_size >> 8,
|
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_surface.c | 151 surf_drm->bo_size = surf_ws->surf_size;
192 surf_ws->surf_size = surf_drm->bo_size;
|
| /external/mesa3d/src/amd/vulkan/ |
| radv_descriptor_set.c | 409 uint64_t bo_size = 0; local
437 bo_size += 32 * pCreateInfo->pPoolSizes[i].descriptorCount;
442 bo_size += 64 * pCreateInfo->pPoolSizes[i].descriptorCount;
445 bo_size += 96 * pCreateInfo->pPoolSizes[i].descriptorCount;
453 if (bo_size) {
454 pool->bo = device->ws->buffer_create(device->ws, bo_size,
458 pool->size = bo_size;
|
| radv_radeon_winsys.h | 192 uint64_t bo_size; member in struct:radeon_surf
|
| radv_image.c | 467 fmask.bo_size = 0;
502 out->size = fmask.bo_size;
718 image->size = image->surface.bo_size;
[all...] |
| /hardware/intel/common/libwsbm/src/ |
| wsbm_ttmpool.c | 147 dBuf->realSize = arg.rep.bo_size;
188 dBuf->requestedSize = arg.rep.bo_size;
191 dBuf->realSize = arg.rep.bo_size;
569 dBuf->realSize = arg.rep.bo_size;
|
| /external/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| nv84_video.c | 613 unsigned bo_size; local
676 bo_size = mt0->total_size + mt1->total_size;
678 bo_size, &cfg, &buffer->interlaced))
683 bo_size, &cfg, &buffer->full))
|
| /external/libdrm/amdgpu/ |
| amdgpu_bo.c | 101 args.in.bo_size = alloc_buffer->alloc_size;
183 info->alloc_size = bo_info.bo_size;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| r600_buffer_common.c | 108 res->bo_size = size;
197 new_buf = rscreen->ws->buffer_create(rscreen->ws, res->bo_size,
|
| radeon_winsys.h | 348 uint64_t bo_size; member in struct:radeon_bo_list_item
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_debug.c | 309 uint64_t size = saved->bo_list[i].bo_size;
315 saved->bo_list[i-1].bo_size;
|
| /external/libdrm/include/drm/ |
| amdgpu_drm.h | 85 uint64_t bo_size; member in struct:drm_amdgpu_gem_create_in
|
| /bionic/libc/kernel/uapi/drm/ |
| amdgpu_drm.h | 63 __u64 bo_size; member in struct:drm_amdgpu_gem_create_in
|
| /external/kernel-headers/original/uapi/drm/ |
| amdgpu_drm.h | 91 __u64 bo_size; member in struct:drm_amdgpu_gem_create_in
|
