/external/icu/icu4c/source/i18n/ |
casetrn.cpp | 39 UCaseContext *csc=(UCaseContext *)context; local 40 Replaceable *rep=(Replaceable *)csc->p; 45 csc->index=csc->cpStart; 46 csc->dir=dir; 49 csc->index=csc->cpLimit; 50 csc->dir=dir; 53 dir=csc->dir; 59 if(csc->start<csc->index) 145 UCaseContext csc; local [all...] |
titletrn.cpp | 113 UCaseContext csc; local 114 uprv_memset(&csc, 0, sizeof(csc)); 115 csc.p = &text; 116 csc.start = offsets.contextStart; 117 csc.limit = offsets.contextLimit; 124 csc.cpStart=textPos; 126 csc.cpLimit=textPos+=U16_LENGTH(c); 131 result=ucase_toFullTitle(fCsp, c, utrans_rep_caseContextIterator, &csc, &s, "", &locCache); 133 result=ucase_toFullLower(fCsp, c, utrans_rep_caseContextIterator, &csc, &s, "", &locCache) [all...] |
/external/mesa3d/src/gallium/winsys/radeon/drm/ |
radeon_drm_cs.c | 95 static bool radeon_init_cs_context(struct radeon_cs_context *csc, 100 csc->fd = ws->fd; 102 csc->chunks[0].chunk_id = RADEON_CHUNK_ID_IB; 103 csc->chunks[0].length_dw = 0; 104 csc->chunks[0].chunk_data = (uint64_t)(uintptr_t)csc->buf; 105 csc->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS; 106 csc->chunks[1].length_dw = 0; 107 csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs 239 struct radeon_cs_context *csc = cs->csc; local 297 struct radeon_cs_context *csc = cs->csc; local 450 struct radeon_cs_context *csc = ((struct radeon_drm_cs*)job)->cst; local [all...] |
radeon_drm_cs.h | 77 struct radeon_cs_context *csc; member in struct:radeon_drm_cs 92 int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo); 106 (num_refs && radeon_lookup_buffer(cs->csc, bo) != -1); 118 index = radeon_lookup_buffer(cs->csc, bo); 123 index = cs->csc->slab_buffers[index].u.slab.real_idx; 125 return cs->csc->relocs[index].write_domain != 0;
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/external/clang/test/CodeGen/ |
complex-convert.c | 12 unsigned long long ull, _Complex signed char csc, 36 sc1 = csc; 37 // CHECK: %[[VAR1:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 58 uc1 = csc; 59 // CHECK-NEXT: %[[VAR11:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 80 sll1 = csc; 81 // CHECK-NEXT: %[[VAR21:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 102 ull1 = csc; 103 // CHECK-NEXT: %[[VAR31:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 244 csc1 = sc + csc; [all...] |
/external/icu/icu4c/source/common/ |
ucasemap.cpp | 226 UCaseContext *csc=(UCaseContext *)context; local 231 csc->index=csc->cpStart; 232 csc->dir=dir; 235 csc->index=csc->cpLimit; 236 csc->dir=dir; 239 dir=csc->dir; 243 if(csc->start<csc->index) 330 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 609 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 628 UCaseContext csc=UCASECONTEXT_INITIALIZER; local [all...] |
ustrcase.cpp | 118 UCaseContext *csc=(UCaseContext *)context; local 123 csc->index=csc->cpStart; 124 csc->dir=dir; 127 csc->index=csc->cpLimit; 128 csc->dir=dir; 131 dir=csc->dir; 135 if(csc->start<csc->index) 213 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 943 UCaseContext csc=UCASECONTEXT_INITIALIZER; local 962 UCaseContext csc=UCASECONTEXT_INITIALIZER; local [all...] |
/external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
amdgpu_cs.h | 116 struct amdgpu_cs_context *csc; member in struct:amdgpu_cs 202 (num_refs && amdgpu_lookup_buffer(cs->csc, bo) != -1); 216 index = amdgpu_lookup_buffer(cs->csc, bo); 220 buffer = bo->bo ? &cs->csc->real_buffers[index] 221 : &cs->csc->slab_buffers[index];
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amdgpu_cs.c | 157 cs->csc->request.ip_type, 158 cs->csc->request.ip_instance, 159 cs->csc->request.ring); 312 struct amdgpu_cs_context *cs = acs->csc; 378 struct amdgpu_cs_context *cs = acs->csc; 434 struct amdgpu_cs_context *cs = acs->csc; 547 struct amdgpu_cs_ib_info *info = &cs->csc->ib[ib_type]; 722 cs->csc = &cs->csc1; 749 cs->csc->request.number_of_ibs = 2; 750 cs->csc->request.ibs = &cs->csc->ib[IB_CONST] [all...] |
/external/skia/experimental/xps_to_png/ |
compile_xps_to_png.bat | 6 @set CSC="C:\Program Files (x86)\MSBuild\14.0\Bin\amd64\csc.exe" 9 %CSC% /lib:%LIB% ^
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/external/mesa3d/src/gallium/state_trackers/xvmc/ |
attributes.c | 80 vl_csc_matrix csc; local 111 &context_priv->procamp, true, &csc 113 vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f);
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context.c | 196 vl_csc_matrix csc; local 294 &context_priv->procamp, true, &csc 296 vl_compositor_set_csc_matrix(&context_priv->cstate, (const vl_csc_matrix *)&csc, 1.0f, 0.0f);
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/hardware/qcom/display/msm8998/sdm/libs/hwc2/ |
hwc_layers.cpp | 39 ColorSpace_t csc = ITU_R_601; local 41 &csc) == 0) { 42 if (csc == ITU_R_601_FR || csc == ITU_R_2020_FR) { 46 switch (csc) { 60 DLOGE("Unsupported CSC: %d", csc); 726 ColorMetaData csc = {}; local 729 bool valid_csc = GetSDMColorSpace(dataspace_, &csc); 733 // if we are here here, update the sdm layer csc [all...] |
/external/vulkan-validation-layers/libs/glm/gtc/ |
reciprocal.hpp | 65 GLM_FUNC_DECL genType csc(genType const & angle);
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/hardware/qcom/display/msm8996/sdm/include/core/ |
layer_buffer.h | 38 /*! @brief This enum represents display layer color space conversion (CSC) matrix types. 229 LayerCSC csc = kCSCFullRange601; //!< Color Space of the layer. member in struct:sdm::LayerBuffer
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/hardware/qcom/display/sdm845/sdm/libs/hwc2/ |
hwc_layers.cpp | 39 ColorSpace_t csc = ITU_R_601; local 41 &csc) == 0) { 42 if (csc == ITU_R_601_FR || csc == ITU_R_2020_FR) { 46 switch (csc) { 60 DLOGE("Unsupported CSC: %d", csc);
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/external/mesa3d/src/gallium/state_trackers/vdpau/ |
mixer.c | 73 vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, true, &vmixer->csc); 75 if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, 1.0f, 0.0f)) { 695 if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, 814 vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, 1, &vmixer->csc); 816 memcpy(vmixer->csc, vdp_csc, sizeof(vl_csc_matrix)); 818 if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, 845 if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, 860 if (!vl_compositor_set_csc_matrix(&vmixer->cstate, (const vl_csc_matrix *)&vmixer->csc, [all...] |
/bionic/libc/kernel/uapi/drm/ |
exynos_drm.h | 123 __u32 csc; member in struct:drm_exynos_ipp_prop_list
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/external/kernel-headers/original/uapi/drm/ |
exynos_drm.h | 186 * @csc: flag of csc supporting. 203 __u32 csc; member in struct:drm_exynos_ipp_prop_list
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/hardware/qcom/display/msm8996/sdm/libs/hwc2/ |
hwc_layers.cpp | 475 ColorSpace_t csc = ITU_R_601; local 476 if (getMetaData(const_cast<private_handle_t *>(pvt_handle), GET_COLOR_SPACE, &csc) == 0) { 477 if (SetCSC(csc, &layer_buffer->csc) != kErrorNone) { 524 DLOGE("Unsupported CSC: %d", source);
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/external/mesa3d/src/gallium/state_trackers/va/ |
context.c | 163 vl_csc_get_matrix(VL_CSC_COLOR_STANDARD_BT_601, NULL, true, &drv->csc); 164 if (!vl_compositor_set_csc_matrix(&drv->cstate, (const vl_csc_matrix *)&drv->csc, 1.0f, 0.0f))
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/hardware/qcom/display/msm8996/sdm/libs/core/ |
display_base.cpp | 628 char csc[8] = { 0 }; local 643 snprintf(csc, sizeof(csc), "%d", layer->input_buffer->csc); 650 z_order, flags, decimation, csc); [all...] |
/bionic/libc/kernel/uapi/linux/ |
omap3isp.h | 331 struct omap3isp_prev_csc __user * csc; member in struct:omap3isp_prev_update_config
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/development/ndk/platforms/android-21/include/linux/ |
omap3isp.h | 409 struct omap3isp_prev_csc __user *csc; member in struct:omap3isp_prev_update_config
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/external/kernel-headers/original/uapi/linux/ |
omap3isp.h | 547 * @offset: CSC offset values for Y offset, CB offset and CR offset respectively 622 * @csc: Pointer to structure for Color Space Conversion from RGB-YCbYCr. 639 struct omap3isp_prev_csc __user *csc; member in struct:omap3isp_prev_update_config
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