/external/lzma/Asm/x86/ |
XzCrc64Opt.asm | 111 CRC macro op0:req, op1:req, dest0:req, dest1:req, src:req, t:req
112 op0 dest0, DWORD PTR [r5 + src * 8 + 0800h * t]
116 CRC_XOR macro dest0:req, dest1:req, src:req, t:req
117 CRC xor, xor, dest0, dest1, src, t
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/external/libvpx/libvpx/vpx_dsp/arm/ |
idct32x32_add_neon.c | 325 uint8_t *dest0 = dest + 0 * stride; local 340 store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7]); 341 dest0 += str2; 364 store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7]); 365 dest0 += str2; 388 store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7]); 389 dest0 += str2; 410 store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7]); 416 uint16_t *dest0 = dest + 0 * stride; local 432 highbd_store_combine_results_bd8(dest0, dest1, stride, q[4], q[5], q[6] [all...] |
highbd_idct32x32_1024_add_neon.c | 292 uint16_t *dest0 = dest + 0 * stride; local 308 highbd_store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7], 310 dest0 += str2; 334 highbd_store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7], 336 dest0 += str2; 360 highbd_store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7], 362 dest0 += str2; 384 highbd_store_combine_results(dest0, dest1, stride, q[4], q[5], q[6], q[7],
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
test_fs_cmod_propagation.cpp | 239 fs_reg dest0 = v->vgrf(glsl_type::float_type); local 245 bld.ADD(dest0, src0, src1); 247 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE); 251 * 0: add(8) dest0 src0 src1 253 * 2: cmp.ge.f0(8) null dest0 0.0f 318 fs_reg dest0 = v->vgrf(glsl_type::float_type); local 324 set_condmod(BRW_CONDITIONAL_GE, bld.ADD(dest0, src0, src1)); 326 bld.CMP(bld.null_reg_f(), dest0, zero, BRW_CONDITIONAL_GE); 330 * 0: add.ge.f0(8) dest0 src0 src1 332 * 2: cmp.ge.f0(8) null dest0 0.0 [all...] |
test_vec4_cmod_propagation.cpp | 327 dst_reg dest0 = dst_reg(v, glsl_type::float_type); local 333 bld.ADD(dest0, src0, src1); 335 bld.CMP(bld.null_reg_f(), src_reg(dest0), zero, BRW_CONDITIONAL_GE); 339 * 0: add dest0 src0 src1 341 * 2: cmp.ge.f0 null dest0 0.0f 408 dst_reg dest0 = dst_reg(v, glsl_type::float_type); local 417 set_condmod(BRW_CONDITIONAL_GE, bld.ADD(dest0, src0, src1)); 419 bld.CMP(dest_null, src_reg(dest0), zero, BRW_CONDITIONAL_GE); 423 * 0: add.ge.f0 dest0 src0 src1 425 * 2: cmp.ge.f0 null.x dest0 0.0 [all...] |
/external/libvpx/libvpx/vp8/common/mips/msa/ |
idct_msa.c | 182 v16u8 dest0, dest1, dest2, dest3; local 199 LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3); 200 ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1, 217 v16u8 dest0, dest1, dest2, dest3; local 243 LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3); 244 ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1, 275 v16u8 dest0, dest1, dest2, dest3; local 284 LD_UB4(dest, dest_stride, dest0, dest1, dest2, dest3); 285 ILVR_B4_SH(zero, dest0, zero, dest1, zero, dest2, zero, dest3, res0, res1,
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/external/webp/src/dsp/ |
dec_msa.c | 48 v16i8 dest0, dest1, dest2, dest3; local 58 LD_SB4(dst, BPS, dest0, dest1, dest2, dest3); 59 ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3, 138 v16u8 dest0, dest1, dest2, dest3; local 144 LD_UB4(dst, BPS, dest0, dest1, dest2, dest3); 145 ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3, [all...] |
enc_msa.c | 49 v16i8 dest0, dest1, dest2, dest3; local 60 LD_SB4(ref, BPS, dest0, dest1, dest2, dest3); 61 ILVR_B4_SW(zero, dest0, zero, dest1, zero, dest2, zero, dest3,
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/external/libvpx/libvpx/vpx_dsp/x86/ |
highbd_loopfilter_sse2.c | 992 uint16_t *dest0[1]; local [all...] |
/external/swiftshader/third_party/subzero/src/DartARM32/ |
assembler_arm.cc | [all...] |