| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| arch-11.s | 4 divss %xmm1,%xmm0 label
|
| arch-11.d | 9 [ ]*[a-f0-9]+: f3 0f 5e c1 divss %xmm1,%xmm0
|
| katmai.s | 69 divss %xmm3,%xmm2
70 divss (%esp,1),%xmm3
|
| simd.s | 47 divss (%eax),%xmm0
147 divss xmm0,DWORD PTR [eax] label
|
| katmai.d | 73 10c: f3 0f 5e d3 [ ]*divss %xmm3,%xmm2
74 110: f3 0f 5e 1c 24 [ ]*divss \(%esp\),%xmm3
|
| x86-64-simd.s | 67 divss (%rax),%xmm0
195 divss xmm0,DWORD PTR [rax] label
|
| simd-suffix.d | 54 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%eax\),%xmm0
147 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%eax\),%xmm0
|
| simd.d | 53 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%eax\),%xmm0
146 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%eax\),%xmm0
|
| simd-intel.d | 54 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[eax\]
147 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[eax\]
|
| sse2avx.s | 515 divss %xmm4,%xmm6
516 divss (%ecx),%xmm6
1176 divss xmm6,xmm4
1177 divss xmm6,DWORD PTR [ecx]
|
| x86-64-simd-intel.d | 74 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[rax\]
193 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 74 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
193 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
|
| x86-64-simd.d | 73 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
192 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
|
| x86-64-sse2avx.s | 539 divss %xmm4,%xmm6
540 divss (%rcx),%xmm6
1243 divss xmm6,xmm4
1244 divss xmm6,DWORD PTR [rcx]
|
| /external/valgrind/memcheck/tests/x86/ |
| sse1_memory.stdout.exp | 221 r divss fbd27466ae20223bd87365c0e59aa4ce 91dcff908da766e2891e079295872f79 000000808da766e2891e079295872f79
222 r divss eec1f674f8d9bae58274caa609695436 e2ec04945ec39d18554fed2f087c2100 000000805ec39d18554fed2f087c2100
223 r divss 8c07ac4500673787d3e98d03f44700c4 af862a7c56a000db4a174ed45c5d85b6 47c3fd7556a000db4a174ed45c5d85b6
224 r divss 69dd7fd9222e8b8671dc272612672a30 ac8379e6f2429f342c21c36e1cfbfdf0 67a5794cf2429f342c21c36e1cfbfdf0
225 r divss 7a5db50e1b7006295e37713e30dcb20f ef9f5a500f89eb0820f745cd360987e5 0000807f0f89eb0820f745cd360987e5
226 m divss 5bb97329 1283f9a2084f589601c6a25a7a98d7d8 2c0a03b9084f589601c6a25a7a98d7d8
227 m divss 1cf5281c e8c9fe292265ed32714ba356e8295235 4f06414d2265ed32714ba356e8295235
228 m divss d6077e35 b0923272069fb73c4c4afc2e2ad0dbda 18f5337c069fb73c4c4afc2e2ad0dbda
229 m divss bb16e6ab 250edf64c3121fa3a53edc8974cb6eb5 a52c78f8c3121fa3a53edc8974cb6eb5
230 m divss 9d8a016b fabf482e4014df3eb2ad7971bf0e2273 725cc6024014df3eb2ad7971bf0e227
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.h | 393 void divss(XmmRegister dst, XmmRegister src);
394 void divss(XmmRegister dst, const Address& src);
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.stdout.exp | 221 r divss fbd27466ae20223bd87365c0e59aa4ce 91dcff908da766e2891e079295872f79 000000808da766e2891e079295872f79
222 r divss eec1f674f8d9bae58274caa609695436 e2ec04945ec39d18554fed2f087c2100 000000805ec39d18554fed2f087c2100
223 r divss 8c07ac4500673787d3e98d03f44700c4 af862a7c56a000db4a174ed45c5d85b6 47c3fd7556a000db4a174ed45c5d85b6
224 r divss 69dd7fd9222e8b8671dc272612672a30 ac8379e6f2429f342c21c36e1cfbfdf0 67a5794cf2429f342c21c36e1cfbfdf0
225 r divss 7a5db50e1b7006295e37713e30dcb20f ef9f5a500f89eb0820f745cd360987e5 0000807f0f89eb0820f745cd360987e5
226 m divss 5bb97329 1283f9a2084f589601c6a25a7a98d7d8 2c0a03b9084f589601c6a25a7a98d7d8
227 m divss 1cf5281c e8c9fe292265ed32714ba356e8295235 4f06414d2265ed32714ba356e8295235
228 m divss d6077e35 b0923272069fb73c4c4afc2e2ad0dbda 18f5337c069fb73c4c4afc2e2ad0dbda
229 m divss bb16e6ab 250edf64c3121fa3a53edc8974cb6eb5 a52c78f8c3121fa3a53edc8974cb6eb5
230 m divss 9d8a016b fabf482e4014df3eb2ad7971bf0e2273 725cc6024014df3eb2ad7971bf0e227
[all...] |
| sse_memory.c | 208 TEST_INSN( &AllMask, SS,divss)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 74 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[rax\]
193 [ ]*[a-f0-9]+: f3 0f 5e 00 divss xmm0,DWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 74 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
193 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
|
| x86-64-simd.d | 74 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
193 [ ]*[a-f0-9]+: f3 0f 5e 00 divss \(%rax\),%xmm0
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 417 void divss(XmmRegister dst, XmmRegister src);
418 void divss(XmmRegister dst, const Address& src);
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| x86-32-coverage.s | 917 // CHECK: divss %xmm5, %xmm5
918 divss %xmm5,%xmm5
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.h | 949 void divss(XMMRegister dst, XMMRegister src) { divss(dst, Operand(src)); }
950 void divss(XMMRegister dst, const Operand& src);
[all...] |
| /external/llvm/test/MC/X86/ |
| x86-32-coverage.s | [all...] |
