| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips.s | [all...] |
| micromips-insn32.d | [all...] |
| micromips-noinsn32.d | [all...] |
| micromips-trap.d | [all...] |
| micromips.d | [all...] |
| /external/valgrind/none/tests/mips64/ |
| change_fp_mode.stdout.exp | 24 dmfc1 $t0, $f0 :: t0: 1234567890abcdef
25 dmfc1 $t0, $f1 :: t0: 5a5a
73 dmfc1 $t0, $f0 :: t0: 1234567890abcdef
74 dmfc1 $t0, $f1 :: t0: 1234567890abcdef
122 dmfc1 $t0, $f0 :: t0: 1234567890abcdef
123 dmfc1 $t0, $f1 :: t0: 5a5a
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips3.s | 26 dmfc1 $12,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 24 dmfc1 $12,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 24 dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips3.s | 22 dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips4.s | 22 dmfc1 $12,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 22 dmfc1 $t0,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/v8/src/mips64/ |
| macro-assembler-mips64.cc | [all...] |
| assembler-mips64.h | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | 510 __ dmfc1(at, i.OutputDoubleRegister()); \
[all...] |
| /external/llvm/test/MC/Mips/micromips64r6/ |
| valid.s | 207 dmfc1 $9, $f4 # CHECK: dmfc1 $9, $f4 # encoding: [0x55,0x24,0x24,0x3b]
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 76 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 80 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 80 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 86 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 88 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 88 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 88 dmfc1 $12,$f13
|
| /external/llvm/test/MC/Mips/ |
| target-soft-float.s | 11 dmfc1 $7, $f2
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| mips-opc.c | [all...] |
