| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips64r2.s | 50 drotr $25, $10, 4 # dror
52 drotr $25, $10, 36 # dror32
54 drotr $25, $10, $4 # drorv
|
| micromips.s | [all...] |
| /external/llvm/test/MC/Mips/ |
| rotations64.s | 111 # CHECK-64R: drotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3a]
131 # CHECK-64R: drotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfa]
136 # CHECK-64R: drotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7a]
139 # CHECK-64R: drotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3a]
159 # CHECK-64R: drotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfa]
164 # CHECK-64R: drotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7a]
182 # CHECK-64R: drotr $4, $4, 1 # encoding: [0x00,0x24,0x20,0x7a]
185 # CHECK-64R: drotr $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3a]
190 # CHECK-64R: drotr $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7a]
195 # CHECK-64R: drotr $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfa
[all...] |
| mips_directives.s | 76 # CHECK: drotr $9, $6, 30 # encoding: [0x00,0x26,0x4f,0xba]
78 drotr $9, $6, 30
|
| mips64-alu-instructions.s | 76 # CHECK: drotr $9, $6, 20 # encoding: [0x3a,0x4d,0x26,0x00]
101 drotr $9, $6, 20
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 14 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 15 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 96 drotr $1,15 # CHECK: drotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfa]
97 drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa]
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 96 drotr $1,15 # CHECK: drotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfa]
97 drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 96 drotr $1,15 # CHECK: drotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xfa]
97 drotr $1,$14,15 # CHECK: drotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xfa]
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| invalid.s | 290 drotr $5, $10, 64 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
291 drotr $5, $10, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
|
| valid.s | 300 drotr $5, $10, 8 # CHECK: drotr $5, $10, 8 # encoding: [0x58,0xaa,0x40,0xc0]
|
| /external/v8/src/mips64/ |
| disasm-mips64.cc | [all...] |
| assembler-mips64.h | 796 void drotr(Register rd, Register rt, uint16_t sa);
[all...] |
| assembler-mips64.cc | 1875 void Assembler::drotr(Register rd, Register rt, uint16_t sa) { function in class:v8::internal::Assembler
[all...] |
| macro-assembler-mips64.cc | 1138 drotr(rd, rs, dror_value);
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| mips-opc.c | [all...] |
