| /external/mesa3d/src/gallium/drivers/ilo/core/ |
| ilo_state_cc.c | 90 uint32_t dw0, dw1, dw2; local
98 dw0 = 0;
107 dw0 |= GEN6_ZS_DW0_STENCIL_TEST_ENABLE;
110 dw0 |= GEN6_ZS_DW0_STENCIL1_ENABLE;
119 dw0 |= front->test_func << GEN6_ZS_DW0_STENCIL_FUNC__SHIFT |
138 dw0 |= GEN6_ZS_DW0_STENCIL_WRITE_ENABLE;
159 cc->ds[0] = dw0;
490 uint32_t dw0, dw1; local
550 dw0 = rt.a_func << GEN6_RT_DW0_ALPHA_FUNC__SHIFT |
558 dw0 |= GEN6_RT_DW0_BLEND_ENABLE
593 uint32_t dw_rt[2 * ILO_STATE_CC_BLEND_MAX_RT_COUNT], dw0, dw1; local
728 uint32_t dw0; local
812 uint32_t dw0 = cc->ds[0]; local
[all...] |
| ilo_state_surface.c | 37 uint32_t dw0, dw3; local
59 dw0 = GEN6_SURFTYPE_NULL << GEN6_SURFACE_DW0_TYPE__SHIFT |
64 surf->surface[0] = dw0;
78 uint32_t dw0; local
82 dw0 = GEN6_SURFTYPE_NULL << GEN7_SURFACE_DW0_TYPE__SHIFT |
85 dw0 |= GEN6_TILING_X << GEN8_SURFACE_DW0_TILING__SHIFT;
87 dw0 |= GEN6_TILING_X << GEN7_SURFACE_DW0_TILING__SHIFT;
90 surf->surface[0] = dw0;
322 uint32_t dw0, dw1, dw2, dw3; local
339 dw0 = GEN6_SURFTYPE_BUFFER << GEN6_SURFACE_DW0_TYPE__SHIFT
367 uint32_t dw0, dw1, dw2, dw3, dw7; local
926 uint32_t dw0, dw2, dw3, dw4, dw5; local
1017 uint32_t dw0, dw1, dw2, dw3, dw4, dw5, dw7; local
[all...] |
| ilo_state_vf.c | 136 uint32_t dw0, dw1; local
164 dw0 = elem->buffer << GEN6_VE_DW0_VB_INDEX__SHIFT |
173 vf->user_ve[i][0] = dw0;
185 vf->last_user_ve[0][0] = dw0;
198 dw0 = elem->buffer << GEN6_VE_DW0_VB_INDEX__SHIFT |
207 vf->last_user_ve[1][0] = dw0;
436 uint32_t dw0 = 0; local
446 dw0 |= GEN6_IB_DW0_CUT_INDEX_ENABLE;
450 vf->cut[0] = dw0;
460 uint32_t dw0 = 0 local
527 uint32_t dw0; local
[all...] |
| ilo_state_sampler.c | 330 uint32_t dw0, dw1, dw3; local
381 dw0 = GEN6_SAMPLER_DW0_LOD_PRECLAMP_ENABLE |
388 dw0 |= GEN7_SAMPLER_DW0_BORDER_COLOR_MODE_DX10_OGL |
393 dw0 |= GEN7_SAMPLER_DW0_ANISO_ALGO_EWA;
395 dw0 |= lod_bias << GEN6_SAMPLER_DW0_LOD_BIAS__SHIFT |
416 dw0 |= GEN6_SAMPLER_DW0_MIN_MAG_NOT_EQUAL;
469 sampler->sampler[0] = dw0;
|
| ilo_state_compute.c | 376 uint32_t dw0, dw2, dw3, dw4, dw5, dw6; local
391 dw0 = interface->kernel_offset;
445 compute->idrt[i][0] = dw0;
|
| ilo_state_viewport.c | 218 uint32_t dw0, dw1; local
225 dw0 = min_y << GEN6_SCISSOR_DW0_MIN_Y__SHIFT |
231 vp->scissor[i][0] = dw0;
|
| ilo_builder_render.h | 58 const uint32_t dw0 = GEN6_RENDER_CMD(SINGLE_DW, PIPELINE_SELECT) | local
75 ilo_builder_batch_write(builder, cmd_len, &dw0);
|
| ilo_builder_3d_top.h | 213 const uint32_t dw0 = GEN6_RENDER_CMD(SINGLE_DW, 3DSTATE_VF_STATISTICS) | local
218 ilo_builder_batch_write(builder, cmd_len, &dw0);
418 uint32_t dw0, *dw; local
423 dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) |
430 dw0 |= ib->ib[0];
432 dw0 |= vf->cut[0];
436 dw[0] = dw0;
[all...] |
| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| sb_bc_decoder.cpp | 33 uint32_t dw0 = dw[i]; local
54 CF_WORD0_EGCM w0(dw0);
83 CF_WORD0_R6R7 w0(dw0);
111 uint32_t dw0 = dw[i++]; local
116 CF_ALU_WORD0_ALL w0(dw0);
144 CF_ALU_WORD0_EXT_EGCM w0(dw0);
177 uint32_t dw0 = dw[i++]; local
181 CF_ALLOC_EXPORT_WORD0_ALL w0(dw0);
231 uint32_t dw0 = dw[i++]; local
236 CF_ALLOC_EXPORT_WORD0_ALL w0(dw0);
292 uint32_t dw0 = dw[i++]; local
406 uint32_t dw0 = dw[i]; local
494 uint32_t dw0 = dw[i]; local
526 uint32_t dw0 = dw[i]; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_draw_upload.c | 803 uint32_t dw0; local
806 dw0 = buffer_nr << GEN6_VB0_INDEX_SHIFT;
808 dw0 = (buffer_nr << GEN6_VB0_INDEX_SHIFT) |
812 dw0 = (buffer_nr << BRW_VB0_INDEX_SHIFT) |
818 dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE;
822 dw0 |= GEN7_MOCS_L3 << 16;
825 dw0 |= BDW_MOCS_WB << 16;
828 dw0 |= SKL_MOCS_WB << 16;
835 OUT_BATCH(dw0 | (stride << BRW_VB0_PITCH_SHIFT));
1068 uint32_t dw0 = 0, dw1 = 0; local
1111 uint32_t dw0 = 0, dw1 = 0; local
[all...] |
| brw_disasm.c | [all...] |
| /external/mesa3d/src/gallium/drivers/ilo/shader/ |
| toy_compiler_disasm.c | 203 disasm_inst_decode_dw0_opcode_gen6(struct disasm_inst *inst, uint32_t dw0)
207 inst->opcode = GEN_EXTRACT(dw0, GEN6_INST_OPCODE);
240 disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0)
244 disasm_inst_decode_dw0_opcode_gen6(inst, dw0);
246 inst->access_mode = GEN_EXTRACT(dw0, GEN6_INST_ACCESSMODE);
249 inst->dep_ctrl = GEN_EXTRACT(dw0, GEN8_INST_DEPCTRL);
250 inst->nib_ctrl = (bool) (dw0 & GEN8_INST_NIBCTRL);
252 inst->mask_ctrl = GEN_EXTRACT(dw0, GEN6_INST_MASKCTRL);
253 inst->dep_ctrl = GEN_EXTRACT(dw0, GEN6_INST_DEPCTRL);
256 inst->qtr_ctrl = GEN_EXTRACT(dw0, GEN6_INST_QTRCTRL)
[all...] |
| toy_compiler_asm.c | 731 * Translate the instruction to DW0 of the 1-src/2-src format.
812 uint32_t dw0, dw1, dw_src[3]; local
818 dw0 = translate_inst_gen8(cg);
820 dw0 = translate_inst_gen6(cg);
891 code[0] = dw0;
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_state.c | 209 GLuint dw0, dw1; local
211 dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
215 dw0 |= S5_LOGICOP_ENABLE;
219 dw0 &= ~S5_LOGICOP_ENABLE;
228 if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
230 i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
[all...] |
| /external/opencv/cxcore/src/ |
| cxdxt.cpp | 441 int dw0 = tab_size, dw;
554 dw0 /= 4;
582 for( j = 1, dw = dw0; j < nx; j++, dw += dw0 )
614 dw0 /= 2;
626 for( j = 1, dw = dw0; j < nx; j++, dw += dw0 )
646 dw0 /= factor;
666 for( j = 1, dw = dw0; j < nx; j++, dw += dw0 )
[all...] |
