| /external/swiftshader/third_party/subzero/src/ |
| IceInstX8664.cpp | 95 const auto RegNum = Var->getRegNum();
166 assert(getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rsp ||
167 getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rbp ||
170 IceType_i32, Base->getRegNum()));
285 (getBase()->getRegNum() == Traits::RegisterSet::Reg_r15) ||
286 (getBase()->getRegNum() == Traits::RegisterSet::Reg_rsp) ||
287 (getBase()->getRegNum() == Traits::RegisterSet::Reg_rbp));
288 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
289 getEncodedGPR(getIndex()->getRegNum()),
295 return X8664::Traits::Address(getEncodedGPR(getBase()->getRegNum()), Disp
[all...] |
| IceInstX86BaseImpl.h | 221 assert(Traits::getEncodedGPR(Eax->getRegNum()) == Encoded_rAX);
233 assert(Edx->getRegNum() == RegisterSet::Reg_edx);
234 assert(Eax->getRegNum() == RegisterSet::Reg_eax);
235 assert(Ecx->getRegNum() == RegisterSet::Reg_ecx);
236 assert(Ebx->getRegNum() == RegisterSet::Reg_ebx);
592 Asm->jmp(Traits::getEncodedGPR(Var->getRegNum()));
654 Asm->call(Traits::getEncodedGPR(Var->getRegNum()));
713 GPRRegister VarReg = Traits::getEncodedGPR(Var->getRegNum());
737 GPRRegister VarReg = VarCanBeByte ? Traits::getEncodedGPR(Var->getRegNum())
738 : Traits::getEncodedGPR(Var->getRegNum());
[all...] |
| IceInstX8632.cpp | 105 const auto RegNum = Var->getRegNum();
293 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()),
294 getEncodedGPR(getIndex()->getRegNum()),
298 return X8632::Traits::Address(getEncodedGPR(getBase()->getRegNum()), Disp,
301 return X8632::Traits::Address(getEncodedGPR(getIndex()->getRegNum()),
|
| IceCfgNode.cpp | 379 const auto RegNum1 = Var1->getRegNum();
380 const auto RegNum2 = Var2->getRegNum();
[all...] |
| IceRegAlloc.cpp | 134 Var->setRegNumTmp(Var->getRegNum());
261 Var->setRegNumTmp(Var->getRegNum());
313 Var->setRegNumTmp(Var->getRegNum());
604 *RegAliases[Item->getRegNum()]; // Note: not getRegNumTmp()
621 const auto RegNum = Cur->getRegNum();
815 Str << (AssignedRegNum == Item->getRegNum() ? "Reassigning "
[all...] |
| IceTargetLoweringMIPS32.cpp | [all...] |
| IceInstARM32.cpp | [all...] |
| IceTargetLoweringARM32.cpp | 407 RegNumT::fixme(RegARM32::getI64PairFirstGPRNum(Var->getRegNum()));
[all...] |
| IceOperand.h | 756 bool hasReg() const { return getRegNum().hasValue(); }
757 RegNumT getRegNum() const { return RegNum; }
[all...] |
| IceTargetLoweringX8664.cpp | 324 const auto RegNum = Var->getRegNum();
442 RegNum = Traits::getGprForType(IceType_i64, T->getRegNum());
|
| IceCfg.cpp | [all...] |
| IceInst.cpp | 1098 if (Dest->hasReg() && Dest->getRegNum() == SrcVar->getRegNum()) {
[all...] |
| IceAssemblerMIPS32.cpp | 127 const auto Reg = Var->getRegNum();
133 const auto Reg = Var->getRegNum();
[all...] |
| IceInstMIPS32.cpp | 430 assert(RA->getRegNum() == RegMIPS32::Reg_RA);
613 assert(RA->getRegNum() == RegMIPS32::Reg_RA);
[all...] |
| IceAssemblerARM32.cpp | 180 const auto Reg = Var->getRegNum();
187 return RegARM32::getEncodedSReg(Var->getRegNum());
191 return RegARM32::getEncodedDReg(Var->getRegNum());
195 return RegARM32::getEncodedQReg(Var->getRegNum());
[all...] |
| IceTargetLowering.cpp | 821 RegsUsed[Var->getRegNum()] = true;
[all...] |
| IceInstX86Base.h | 673 MemOp->getBase()->getRegNum() == this->getDest()->getRegNum() &&
[all...] |
| IceTargetLoweringARM32.h | [all...] |
| IceTargetLoweringX86BaseImpl.h | [all...] |
| IceTargetLoweringX86Base.h | 198 const std::string RegName = Traits::getRegName(Dest->getRegNum());
[all...] |
