| /art/compiler/jni/quick/ |
| jni_compiler.cc | 258 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
260 CHECK_LT(handle_scope_offset.Uint32Value(), frame_size);
269 __ StoreRef(handle_scope_offset, main_jni_conv->InterproceduralScratchRegister());
281 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
283 CHECK_LT(handle_scope_offset.Uint32Value(), frame_size);
284 CHECK_NE(handle_scope_offset.Uint32Value(),
293 __ StoreRef(handle_scope_offset, in_reg);
297 __ CopyRef(handle_scope_offset, in_off,
474 FrameOffset handle_scope_offset = main_jni_conv->CurrentParamHandleScopeEntryOffset(); local
477 __ CreateHandleScopeEntry(out_off, handle_scope_offset,
[all...] |
| /art/compiler/utils/arm/ |
| jni_macro_assembler_arm_vixl.cc | 445 FrameOffset handle_scope_offset,
462 handle_scope_offset.Int32Value());
469 if (asm_.ShifterOperandCanHold(ADD, handle_scope_offset.Int32Value(), kCcDontCare)) {
476 asm_.AddConstantInIt(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value(), ne);
482 asm_.AddConstantInIt(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value(), ne);
489 asm_.AddConstant(out_reg.AsVIXLRegister(), sp, handle_scope_offset.Int32Value());
494 FrameOffset handle_scope_offset,
502 asm_.LoadFromOffset(kLoadWord, scratch.AsVIXLRegister(), sp, handle_scope_offset.Int32Value());
505 // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
508 if (asm_.ShifterOperandCanHold(ADD, handle_scope_offset.Int32Value(), kCcDontCare))
[all...] |
| /art/compiler/utils/x86_64/ |
| jni_macro_assembler_x86_64.cc | 475 FrameOffset handle_scope_offset,
484 __ movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
496 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
499 __ leaq(out_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
504 FrameOffset handle_scope_offset,
511 __ movl(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
514 __ leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
517 __ leaq(scratch.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset));
|
| /art/compiler/utils/x86/ |
| jni_macro_assembler_x86.cc | 424 FrameOffset handle_scope_offset,
439 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
442 __ leal(out_reg.AsCpuRegister(), Address(ESP, handle_scope_offset));
447 FrameOffset handle_scope_offset,
454 __ movl(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
457 __ leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
460 __ leal(scratch.AsCpuRegister(), Address(ESP, handle_scope_offset));
|
| /art/compiler/utils/arm64/ |
| jni_macro_assembler_arm64.cc | 587 FrameOffset handle_scope_offset,
594 handle_scope_offset.Int32Value());
597 // e.g. scratch = (scratch == 0) ? 0 : (SP+handle_scope_offset)
600 AddConstant(scratch.AsXRegister(), SP, handle_scope_offset.Int32Value(), ne);
602 AddConstant(scratch.AsXRegister(), SP, handle_scope_offset.Int32Value(), al);
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | [all...] |
