| /external/vixl/src/aarch64/ |
| instructions-aarch64.cc | 338 ptrdiff_t imm21; local
340 imm21 = target - this;
345 imm21 = target_page - this_page;
347 Instr imm = Assembler::ImmPCRelAddress(static_cast<int32_t>(imm21));
|
| assembler-aarch64.h | 591 void adr(const Register& xd, int64_t imm21);
597 void adrp(const Register& xd, int64_t imm21);
[all...] |
| assembler-aarch64.cc | 377 void Assembler::adr(const Register& xd, int64_t imm21) {
379 Emit(ADR | ImmPCRelAddress(imm21) | Rd(xd));
388 void Assembler::adrp(const Register& xd, int64_t imm21) {
390 Emit(ADRP | ImmPCRelAddress(imm21) | Rd(xd));
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 347 int32_t imm21 = instr->Imm21Value(); local
349 imm21 <<= (32 - kImm21Bits);
350 imm21 >>= (32 - kImm21Bits);
351 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21);
359 int32_t imm21 = instr->Imm21Value(); local
361 imm21 <<= (32 - kImm21Bits);
362 imm21 >>= (32 - kImm21Bits);
366 delta_pc + (imm21 << n_bits)));
618 DCHECK(STRING_STARTS_WITH(format, "imm21"));
1658 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| assembler-mips.cc | 1968 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); local
1976 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); local
1984 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); local
1992 uint32_t imm21 = ALUIPC << kImm16Bits | (imm16 & kImm16Mask); local
[all...] |
| simulator-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | 350 int32_t imm21 = instr->Imm21Value(); local
352 imm21 <<= (32 - kImm21Bits);
353 imm21 >>= (32 - kImm21Bits);
354 out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", imm21);
362 int32_t imm21 = instr->Imm21Value(); local
364 imm21 <<= (32 - kImm21Bits);
365 imm21 >>= (32 - kImm21Bits);
369 delta_pc + (imm21 << n_bits)));
634 DCHECK(STRING_STARTS_WITH(format, "imm21"));
1875 int32_t imm21 = instr->Imm21Value(); local
[all...] |
| assembler-mips64.cc | 2204 uint32_t imm21 = ADDIUPC << kImm19Bits | (imm19 & kImm19Mask); local
2212 uint32_t imm21 = LWPC << kImm19Bits | (offset19 & kImm19Mask); local
2220 uint32_t imm21 = LWUPC << kImm19Bits | (offset19 & kImm19Mask); local
2228 uint32_t imm21 = LDPC << kImm18Bits | (offset18 & kImm18Mask); local
2236 uint32_t imm21 = AUIPC << kImm16Bits | (imm16 & kImm16Mask); local
2244 uint32_t imm21 = ALUIPC << kImm16Bits | (imm16 & kImm16Mask); local
[all...] |
| simulator-mips64.cc | [all...] |
| /external/v8/src/arm64/ |
| assembler-arm64-inl.h | 966 Instr Assembler::ImmPCRelAddress(int imm21) {
967 CHECK(is_int21(imm21));
968 Instr imm = static_cast<Instr>(truncate_to_int21(imm21));
[all...] |
| assembler-arm64.h | [all...] |
| assembler-arm64.cc | [all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64.cc | 149 void Mips64Assembler::EmitI21(int opcode, GpuRegister rs, uint32_t imm21) {
151 CHECK(IsUint<21>(imm21)) << imm21;
154 imm21;
780 void Mips64Assembler::Beqzc(GpuRegister rs, uint32_t imm21) {
782 EmitI21(0x36, rs, imm21);
785 void Mips64Assembler::Bnezc(GpuRegister rs, uint32_t imm21) {
787 EmitI21(0x3E, rs, imm21);
[all...] |
| assembler_mips64.h | 562 void Beqzc(GpuRegister rs, uint32_t imm21);
563 void Bnezc(GpuRegister rs, uint32_t imm21);
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.h | 305 // to the following R2 and R6 branch/jump instructions with imm16, imm21, addr26
348 void Beqzc(Register rs, uint32_t imm21); // R6
349 void Bnezc(Register rs, uint32_t imm21); // R6
[all...] |
| assembler_mips.cc | 361 uint32_t MipsAssembler::EmitI21(int opcode, Register rs, uint32_t imm21) {
363 CHECK(IsUint<21>(imm21)) << imm21;
366 imm21;
[all...] |
| /toolchain/binutils/binutils-2.25/gold/ |
| aarch64.cc | 133 // Encode imm21 into adr. Signed imm21 is in the range of [-1M, 1M).
135 aarch64_adr_encode_imm(Insntype adr, int imm21)
138 gold_assert(-(1 << 20) <= imm21 && imm21 < (1 << 20));
142 adr |= ((imm21 & mask2) << 29) | (((imm21 >> 2) & mask19) << 5);
[all...] |
