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  /device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/Arm/
Synchronization.S 95 ldrex r3, [r0]
176 ldrex r1, [r0]
206 ldrex r1, [r0]
Synchronization.asm 94 ldrex r3, [r0]
175 ldrex r1, [r0]
205 ldrex r1, [r0]
  /external/compiler-rt/lib/builtins/arm/
sync-ops.h 26 ldrex r0, [r12] ; \
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
r15-bad.s 63 ldrex r15, [r2]
64 ldrex r1, [r15]
archv6t2-bad.s 59 ldrex r0, r2
r15-bad.l 60 [^:]*:63: Error: r15 not allowed here -- `ldrex r15,[[]r2[]]'
61 [^:]*:64: Error: instruction does not accept this addressing mode -- `ldrex r1,[[]r15[]]'
sp-pc-validations-bad.s 62 @ LDREX
63 ldrex pc,[r0] @ Unpredictable label
64 ldrex r0,[pc] @ ditto label
sp-pc-validations-bad-t.l 64 [^:]*:111: Error: r15 not allowed here -- `ldrex pc,\[r0\]'
65 [^:]*:112: Error: r13 not allowed here -- `ldrex sp,\[r0\]'
66 [^:]*:113: Error: r15 not allowed here -- `ldrex r0,\[pc\]'
sp-pc-validations-bad-t.s 110 @ LDREX/B/D/H
111 ldrex pc, [r0] @ BadReg label
112 ldrex sp, [r0] @ ditto label
113 ldrex r0, [pc] @ Unpredictable label
archv6.s 8 ldrex r2, [r4]
sp-pc-validations-bad.l 38 [^:]*:63: Error: r15 not allowed here -- `ldrex pc,\[r0\]'
39 [^:]*:64: Error: instruction does not accept this addressing mode -- `ldrex r0,\[pc\]'
archv6.d 11 0+00c <[^>]*> e1942f9f ? ldrex r2, \[r4\]
thumb32.s 398 ldrex r1, [r4]
407 ldrex r1, [r4,#516]
thumb32.d 554 0[0-9a-f]+ <[^>]+> e854 1f00 ldrex r1, \[r4\]
561 0[0-9a-f]+ <[^>]+> e854 1f81 ldrex r1, \[r4, #516\].*
    [all...]
  /external/llvm/test/MC/ARM/
thumbv8m.s 63 // CHECK: ldrex r1, [r2, #4] @ encoding: [0x52,0xe8,0x01,0x1f]
64 ldrex r1, [r2, #4] label
basic-thumb2-instructions.s     [all...]
  /external/swiftshader/third_party/subzero/src/
IceAssemblerARM32.h 225 void ldrex(const Operand *OpRt, const Operand *OpAddress,
228 void ldrex(const Operand *OpRt, const Operand *OpAddress, function in namespace:Ice::ARM32
231 ldrex(OpRt, OpAddress, Cond, TInfo);
IceTargetLoweringARM32.h 265 /// ldrex tmp, [Addr]
400 auto *Ldrex = Context.insert<InstARM32Ldrex>(Dest, Addr, Pred);
405 return Ldrex;
    [all...]
IceTargetLoweringARM32.cpp     [all...]
  /external/v8/src/arm/
disasm-arm.cc 763 // ldrex
766 Format(instr, "ldrex'cond 'rt, ['rn]");
    [all...]
assembler-arm.h     [all...]
  /external/swiftshader/third_party/LLVM/test/MC/ARM/
basic-thumb2-instructions.s 748 @ LDREX/LDREXB/LDREXH/LDREXD
750 ldrex r1, [r4]
751 ldrex r8, [r4, #0]
752 ldrex r2, [sp, #128]
757 @ CHECK: ldrex r1, [r4] @ encoding: [0x54,0xe8,0x00,0x1f]
758 @ CHECK: ldrex r8, [r4] @ encoding: [0x54,0xe8,0x00,0x8f]
759 @ CHECK: ldrex r2, [sp, #128] @ encoding: [0x5d,0xe8,0x20,0x2f]
    [all...]
basic-arm-instructions.s     [all...]
  /external/swiftshader/third_party/subzero/src/DartARM32/
assembler_arm.h 591 // Moved to ARM::AssemblerARM32::ldrex();
592 void ldrex(Register rd, Register rn, Condition cond = AL);
    [all...]
  /external/vixl/src/aarch32/
assembler-aarch32.h 2399 void ldrex(Register rt, const MemOperand& operand) { ldrex(al, rt, operand); } function in class:vixl::aarch32::Assembler
    [all...]

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