/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
rm7000.s | 4 mflo $7
|
mul-ilocks.d | 12 0+0004 <[^>]*> mflo a0 14 0+000c <[^>]*> mflo a0 17 0+0018 <[^>]*> mflo a0 20 0+0024 <[^>]*> mflo a0 23 0+0030 <[^>]*> mflo a0 26 0+003c <[^>]*> mflo a0 29 0+0048 <[^>]*> mflo a0 33 0+0058 <[^>]*> mflo a0 35 0+0060 <[^>]*> mflo a0 41 0+0078 <[^>]*> mflo a [all...] |
mul.d | 11 0+0004 <[^>]*> mflo a0 14 0+0014 <[^>]*> mflo a0 18 0+0024 <[^>]*> mflo a0 22 0+0034 <[^>]*> mflo a0 26 0+0044 <[^>]*> mflo a0 30 0+0054 <[^>]*> mflo a0 34 0+0064 <[^>]*> mflo a0 38 0+0074 <[^>]*> mflo a0 41 0+0084 <[^>]*> mflo a0 47 0+009c <[^>]*> mflo a [all...] |
vr4120.s | 2 mflo $4 11 mflo $4
|
div-ilocks.d | 20 0+0028 <[^>]*> mflo a0 30 0+0050 <[^>]*> mflo a0 37 0+006c <[^>]*> mflo a0 40 0+0078 <[^>]*> mflo a0 43 0+0084 <[^>]*> mflo a0 46 0+0090 <[^>]*> mflo a0 49 0+009c <[^>]*> mflo a0 52 0+00a8 <[^>]*> mflo a0 55 0+00b4 <[^>]*> mflo a0 58 0+00c0 <[^>]*> mflo a [all...] |
div.d | 20 0+0028 <[^>]*> mflo a0 31 0+0054 <[^>]*> mflo a0 38 0+0070 <[^>]*> mflo a0 42 0+0080 <[^>]*> mflo a0 46 0+0090 <[^>]*> mflo a0 50 0+00a0 <[^>]*> mflo a0 54 0+00b0 <[^>]*> mflo a0 58 0+00c0 <[^>]*> mflo a0 62 0+00d0 <[^>]*> mflo a0 66 0+00e0 <[^>]*> mflo a [all...] |
rm7000.d | 13 * c: 00003812 * mflo \$7
|
vr4120.d | 9 + 0: 00002012 mflo a0 19 +2c: 00002012 mflo a0
|
elf_e_flags1.d | 15 4: 00001012 mflo v0
|
vr4130.d | 20 .* mflo .* 303 .* mflo .* 310 .* mflo .* 317 .* mflo .* 324 .* mflo .* 475 .* mflo .* 480 .* mflo .* 502 .* mflo .* 784 .* mflo .* 791 .* mflo . [all...] |
mips16-macro.d | 14 [ 0-9a-f]+: ea12 mflo \$2 18 [ 0-9a-f]+: eb12 mflo \$3 22 [ 0-9a-f]+: ec12 mflo \$4 26 [ 0-9a-f]+: ed12 mflo \$5 44 [ 0-9a-f]+: ec12 mflo \$4 46 [ 0-9a-f]+: ed12 mflo \$5
|
vr4130.s | 2 mflo $2 27 mflo $2 358 mflo $2 361 mflo $2
|
/external/llvm/test/MC/Mips/ |
macro-ddivu.s | 10 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 16 # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 22 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 28 # CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] 34 # CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] 40 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 46 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 52 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 60 # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 65 # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12 [all...] |
macro-divu.s | 10 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 16 # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 22 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 34 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 40 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 46 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 54 # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 59 # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 64 # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 75 # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12 [all...] |
macro-div.s | 16 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 28 # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 49 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 67 # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 76 # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 94 # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
|
elf-gprel-32-64.s | 52 mflo $3
|
macro-ddiv.s | 17 # CHECK-NOTRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 30 # CHECK-NOTRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 46 # CHECK-NOTRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] 62 # CHECK-NOTRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12] 81 # CHECK-TRAP: mflo $25 # encoding: [0x00,0x00,0xc8,0x12] 91 # CHECK-TRAP: mflo $24 # encoding: [0x00,0x00,0xc0,0x12] 104 # CHECK-TRAP: mflo $zero # encoding: [0x00,0x00,0x00,0x12] 117 # CHECK-TRAP: mflo $4 # encoding: [0x00,0x00,0x20,0x12]
|
do_switch3.s | 44 mflo $2
|
micromips-16-bit-instructions.s | 44 # CHECK-EL: mflo $9 # encoding: [0x49,0x46] 99 # CHECK-EB: mflo $9 # encoding: [0x46,0x49] 152 mflo $9
|
/art/runtime/interpreter/mterp/mips/ |
op_mul_long_2addr.S | 21 mflo v0 # v0= a2a0
|
op_mul_long.S | 29 mflo v0 # v0= a2a0
|
/external/llvm/test/MC/Mips/mips32r6/ |
invalid-mips1.s | 17 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
invalid-mips2.s | 23 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
/external/llvm/test/MC/Mips/mips64r6/ |
invalid-mips1.s | 20 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
/external/llvm/test/MC/Mips/dsp/ |
valid.s | 58 mflo $15, $ac0 # CHECK: mflo $15, $ac0 # encoding: [0x00,0x00,0x78,0x12] 60 mflo $15 # CHECK: mflo $15 # encoding: [0x00,0x00,0x78,0x12]
|