| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mul-ilocks.d | 11 0+0000 <[^>]*> multu a0,a1
13 0+0008 <[^>]*> multu a1,a2
50 0+009c <[^>]*> multu a0,a1
56 0+00b4 <[^>]*> multu a1,a2
|
| mul.d | 10 0+0000 <[^>]*> multu a0,a1
13 0+0010 <[^>]*> multu a1,a2
58 0+00d0 <[^>]*> multu a0,a1
64 0+00e8 <[^>]*> multu a1,a2
|
| vr4120-2.s | 73 multu $4,$5
89 multu $4,$5
|
| elf_e_flags1.d | 14 0: 00850019 multu a0,a1
|
| r5900.d | 74 [0-9a-f]+ <[^>]*> 001f0019 multu \$0,\$31
75 [0-9a-f]+ <[^>]*> 03e0f819 multu \$31,\$31,\$0
76 [0-9a-f]+ <[^>]*> 001f0019 multu \$0,\$31
77 [0-9a-f]+ <[^>]*> 03e0f819 multu \$31,\$31,\$0
|
| mips32-dspr2.s | 36 multu $ac0,$22,$23
|
| vr4120-2.d | 78 .* <[^>]*> multu a0,a1
98 .* <[^>]*> multu a0,a1
|
| mips32-dspr2.d | 37 0+006c <[^>]*> 02d70019 multu s6,s7
|
| mipsr6@mips32-dspr2.d | 38 0+006c <[^>]*> 02d70019 multu \$ac0,s6,s7
|
| r5900-full.d | 354 [0-9a-f]+ <[^>]*> 001f0019 multu \$0,\$31
355 [0-9a-f]+ <[^>]*> 03e0f819 multu \$31,\$31,\$0
356 [0-9a-f]+ <[^>]*> 001f0019 multu \$0,\$31
357 [0-9a-f]+ <[^>]*> 03e0f819 multu \$31,\$31,\$0
|
| vr4130.s | 316 check2 multu
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/dlx/ |
| rtype.d | 16 18: 01 4b 60 06 multu r12,r10,r11
24 38: 01 bf 78 06 multu r15,r13,r31
|
| rtype.s | 8 multu t4,t2,t3
|
| /art/runtime/interpreter/mterp/mips/ |
| op_mul_long_2addr.S | 19 multu a2, a0
|
| op_mul_long.S | 27 multu a2, a0
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips1.s | 23 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
24 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 29 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips1.s | 26 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
27 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 32 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
33 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 22 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
23 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 43 multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/ |
| mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| /external/llvm/test/MC/Mips/dsp/ |
| valid.s | 78 multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x85,0x10,0x19]
80 multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
|
