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    Searched refs:pp_txfilter (Results 1 - 10 of 10) sorted by null

  /external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_tex.c 64 t->pp_txfilter &= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
68 t->pp_txfilter |= RADEON_CLAMP_S_WRAP;
71 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
75 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_LAST;
78 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
82 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR;
85 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
89 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
92 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
102 t->pp_txfilter |= RADEON_CLAMP_T_WRAP
    [all...]
radeon_texstate.c 600 t->pp_txfilter |= tx_table[MESA_FORMAT_B8G8R8A8_UNORM].filter;
606 t->pp_txfilter |= tx_table[MESA_FORMAT_BGR_UNORM8].filter;
611 t->pp_txfilter |= tx_table[MESA_FORMAT_B5G6R5_UNORM].filter;
723 cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
928 t->pp_txfilter &= ~RADEON_YUV_TO_RGB;
931 t->pp_txfilter |= table[ firstImage->TexFormat ].filter;
939 t->pp_txfilter &= ~RADEON_MAX_MIP_LEVEL_MASK;
940 t->pp_txfilter |= (t->maxLod - t->minLod) << RADEON_MAX_MIP_LEVEL_SHIFT;
1000 if (unit != 0 && (t->pp_txfilter & RADEON_YUV_TO_RGB))
    [all...]
radeon_common_context.h 205 GLuint pp_txfilter; /* hardware register values */ member in struct:radeon_tex_obj
  /external/mesa3d/src/mesa/drivers/dri/r200/
r200_tex.c 73 t->pp_txfilter &= ~(R200_CLAMP_S_MASK | R200_CLAMP_T_MASK | R200_BORDER_MODE_D3D);
77 t->pp_txfilter |= R200_CLAMP_S_WRAP;
80 t->pp_txfilter |= R200_CLAMP_S_CLAMP_GL;
84 t->pp_txfilter |= R200_CLAMP_S_CLAMP_LAST;
87 t->pp_txfilter |= R200_CLAMP_S_CLAMP_GL;
91 t->pp_txfilter |= R200_CLAMP_S_MIRROR;
94 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_GL;
98 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_LAST;
101 t->pp_txfilter |= R200_CLAMP_S_MIRROR_CLAMP_GL;
111 t->pp_txfilter |= R200_CLAMP_T_WRAP
    [all...]
r200_texstate.c 699 t->pp_txfilter |= tx_table_le[MESA_FORMAT_B8G8R8A8_UNORM].filter;
705 t->pp_txfilter |= tx_table_le[MESA_FORMAT_BGR_UNORM8].filter;
710 t->pp_txfilter |= tx_table_le[MESA_FORMAT_B5G6R5_UNORM].filter;
985 cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
    [all...]
  /bionic/libc/kernel/uapi/drm/
radeon_drm.h 304 unsigned int pp_txfilter; member in struct:__anon374
  /external/kernel-headers/original/uapi/drm/
radeon_drm.h 409 unsigned int pp_txfilter; member in struct:__anon21220
    [all...]
  /external/libdrm/include/drm/
radeon_drm.h 409 unsigned int pp_txfilter; member in struct:__anon23216
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/drm/
radeon_drm.h 405 unsigned int pp_txfilter; member in struct:__anon54497
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/drm/
radeon_drm.h 405 unsigned int pp_txfilter; member in struct:__anon56293
    [all...]

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