| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_qir.h | 91 struct qreg { struct
97 static inline struct qreg qir_reg(enum qfile file, uint32_t index)
99 return (struct qreg){file, index};
200 struct qreg dst;
201 struct qreg src[3];
421 * qreg for the values.
434 struct qreg *inputs;
435 struct qreg *outputs;
437 struct qreg color_reads[VC4_MAX_SAMPLES];
438 struct qreg sample_colors[VC4_MAX_SAMPLES]
[all...] |
| vc4_qir_emit_uniform_stream_resets.c | 58 struct qreg t = qir_get_temp(c);
59 struct qreg uni_addr =
|
| vc4_program.c | 42 static struct qreg
49 struct qreg **regs,
58 *regs = reralloc(c, *regs, struct qreg, *size);
85 static struct qreg
88 struct qreg indirect_offset = ntq_get_src(c, intr->src[0], 0);
154 static struct qreg *
157 struct qreg *qregs = ralloc_array(c->def_ht, struct qreg,
170 * If it's a NIR reg, then we need to update the existing qreg assigned to the
172 * new MOVs, we require that the incoming qreg either be a uniform, or b
[all...] |
| vc4_qir.c | 347 qir_print_reg(struct vc4_compile *c, struct qreg reg, bool write)
520 struct qreg
523 struct qreg reg;
542 qir_inst(enum qop op, struct qreg dst, struct qreg src0, struct qreg src1)
562 struct qreg
589 qir_reg_equals(struct qreg a, struct qreg b)
671 struct qreg
[all...] |
| vc4_qir_lower_uniforms.c | 48 add_uniform(struct hash_table *ht, struct qreg reg)
62 remove_uniform(struct hash_table *ht, struct qreg reg)
149 struct qreg unif = qir_reg(QFILE_UNIF, max_index);
|
| vc4_opt_algebraic.c | 63 is_constant_value(struct vc4_compile *c, struct qreg reg,
80 is_zero(struct vc4_compile *c, struct qreg reg)
87 is_1f(struct vc4_compile *c, struct qreg reg)
94 replace_with_mov(struct vc4_compile *c, struct qinst *inst, struct qreg arg)
|
| vc4_opt_constant_folding.c | 65 struct qreg reg = inst->src[i];
|
| vc4_opt_small_immediates.c | 67 struct qreg src = qir_follow_movs(c, inst->src[i]);
|
| vc4_opt_peephole_sf.c | 78 src_file_varies_on_reread(struct qreg reg)
|
| vc4_qir_validate.c | 109 struct qreg src = inst->src[i];
|
| vc4_qir_live_variables.c | 50 qir_reg_to_var(struct qreg reg)
60 struct qreg src)
|
| /external/vixl/test/aarch32/ |
| test-utils-aarch32.cc | 168 const QRegister& qreg) {
170 vec128_t result = core->GetQRegisterBits(qreg.GetCode());
|
| test-utils-aarch32.h | 181 const QRegister& qreg);
|
| /external/vixl/test/aarch64/ |
| test-utils-aarch64.h | 116 inline vec128_t qreg(unsigned code) const { return dump_.q_[code]; } function in class:vixl::aarch64::RegisterDump
|
| test-utils-aarch64.cc | 163 vec128_t result = core->qreg(vreg.GetCode());
|
| /external/v8/src/arm/ |
| simulator-arm.h | 158 void get_q_register(int qreg, T* value);
160 void set_q_register(int qreg, const T* value);
|
| simulator-arm.cc | 903 void Simulator::get_q_register(int qreg, T* value) {
904 DCHECK((qreg >= 0) && (qreg < num_q_registers));
905 memcpy(value, vfp_registers_ + qreg * 4, kSimd128Size);
909 void Simulator::set_q_register(int qreg, const T* value) {
910 DCHECK((qreg >= 0) && (qreg < num_q_registers));
911 memcpy(vfp_registers_ + qreg * 4, value, kSimd128Size);
[all...] |
| /external/vixl/src/aarch64/ |
| simulator-aarch64.h | [all...] |
