| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| radv_amdgpu_surface.h | 31 ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id, enum chip_class chip_class);
|
| radv_amdgpu_winsys.h | 44 uint32_t rev_id; member in struct:radv_amdgpu_winsys
|
| radv_amdgpu_winsys.c | 203 /* family and rev_id are for addrlib */
207 ws->rev_id = SI_TAHITI_P_A0;
211 ws->rev_id = SI_PITCAIRN_PM_A0;
215 ws->rev_id = SI_CAPEVERDE_M_A0;
219 ws->rev_id = SI_OLAND_M_A0;
223 ws->rev_id = SI_HAINAN_V_A0;
227 ws->rev_id = CI_BONAIRE_M_A0;
231 ws->rev_id = KV_SPECTRE_A0;
235 ws->rev_id = KB_KALINDI_A0;
239 ws->rev_id = CI_HAWAII_P_A0
[all...] |
| radv_amdgpu_surface.c | 114 ADDR_HANDLE radv_amdgpu_addr_create(struct amdgpu_gpu_info *amdinfo, int family, int rev_id,
147 addrCreateInput.chipRevision = rev_id;
|
| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| amdgpu_winsys.c | 233 /* family and rev_id are for addrlib */
237 ws->rev_id = SI_TAHITI_P_A0;
241 ws->rev_id = SI_PITCAIRN_PM_A0;
245 ws->rev_id = SI_CAPEVERDE_M_A0;
249 ws->rev_id = SI_OLAND_M_A0;
253 ws->rev_id = SI_HAINAN_V_A0;
257 ws->rev_id = CI_BONAIRE_M_A0;
261 ws->rev_id = KV_SPECTRE_A0;
265 ws->rev_id = KB_KALINDI_A0;
269 ws->rev_id = CI_HAWAII_P_A0
[all...] |
| amdgpu_winsys.h | 74 uint32_t rev_id; member in struct:amdgpu_winsys
|
| amdgpu_surface.c | 132 addrCreateInput.chipRevision = ws->rev_id;
|
| /external/syslinux/gpxe/src/drivers/net/ |
| atl1e.c | 221 u8 rev_id = 0; local
227 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
231 if (rev_id >= 0xF0) {
[all...] |
| via-velocity.c | 854 if (pci_read_config_byte(pdev, PCI_REVISION_ID, &vptr->rev_id) < 0) {
[all...] |
| via-velocity.h | 1109 volatile u8 rev_id; member in struct:mac_regs
1794 u8 rev_id; member in struct:velocity_info
[all...] |
| /hardware/intel/img/psb_video/src/ |
| psb_drv_video.c | [all...] |
