| /external/fio/ |
| io_u_queue.c | 20 int io_u_rinit(struct io_u_ring *ring, unsigned int nr)
22 ring->max = nr + 1;
23 if (ring->max & (ring->max - 1)) {
24 ring->max--;
25 ring->max |= ring->max >> 1;
26 ring->max |= ring->max >> 2;
27 ring->max |= ring->max >> 4
[all...] |
| /external/libdrm/freedreno/ |
| freedreno_ringbuffer.c | 42 struct fd_ringbuffer *ring; local
44 ring = pipe->funcs->ringbuffer_new(pipe, size);
45 if (!ring)
48 ring->pipe = pipe;
49 ring->start = ring->funcs->hostptr(ring);
50 ring->end = &(ring->start[ring->size/4])
193 struct fd_ringbuffer *ring = marker->ring; local
[all...] |
| freedreno_ringbuffer.h | 54 void fd_ringbuffer_del(struct fd_ringbuffer *ring);
55 void fd_ringbuffer_set_parent(struct fd_ringbuffer *ring,
57 void fd_ringbuffer_reset(struct fd_ringbuffer *ring);
58 int fd_ringbuffer_flush(struct fd_ringbuffer *ring);
62 int fd_ringbuffer_flush2(struct fd_ringbuffer *ring, int in_fence_fd,
64 void fd_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t ndwords);
65 uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring);
67 static inline void fd_ringbuffer_emit(struct fd_ringbuffer *ring,
70 (*ring->cur++) = data;
86 void fd_ringbuffer_reloc2(struct fd_ringbuffer *ring, const struct fd_reloc *reloc)
[all...] |
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_ringbuffer.c | 26 struct util_ringbuffer *ring = CALLOC_STRUCT(util_ringbuffer); local
27 if (!ring)
32 ring->buf = MALLOC( dwords * sizeof(unsigned) );
33 if (ring->buf == NULL)
36 ring->mask = dwords - 1;
38 pipe_condvar_init(ring->change);
39 pipe_mutex_init(ring->mutex);
40 return ring;
43 FREE(ring->buf);
44 FREE(ring);
[all...] |
| u_ringbuffer.h | 19 void util_ringbuffer_destroy( struct util_ringbuffer *ring );
21 void util_ringbuffer_enqueue( struct util_ringbuffer *ring,
24 enum pipe_error util_ringbuffer_dequeue( struct util_ringbuffer *ring,
|
| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| fd2_gmem.c | 62 struct fd_ringbuffer *ring = batch->gmem; local
66 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
67 OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_INFO));
68 OUT_RING(ring, A2XX_RB_COLOR_INFO_SWAP(swap) |
72 OUT_PKT3(ring, CP_SET_CONSTANT, 5);
73 OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_CONTROL));
74 OUT_RING(ring, 0x00000000); /* RB_COPY_CONTROL */
75 OUT_RELOCW(ring, rsc->bo, 0, 0, 0); /* RB_COPY_DEST_BASE */
76 OUT_RING(ring, rsc->slices[0].pitch >> 5); /* RB_COPY_DEST_PITCH */
77 OUT_RING(ring, /* RB_COPY_DEST_INFO *
102 struct fd_ringbuffer *ring = batch->gmem; local
180 struct fd_ringbuffer *ring = batch->gmem; local
225 struct fd_ringbuffer *ring = batch->gmem; local
336 struct fd_ringbuffer *ring = batch->gmem; local
359 struct fd_ringbuffer *ring = batch->gmem; local
381 struct fd_ringbuffer *ring = batch->gmem; local
[all...] |
| fd2_draw.c | 46 emit_cacheflush(struct fd_ringbuffer *ring)
51 OUT_PKT3(ring, CP_EVENT_WRITE, 1);
52 OUT_RING(ring, CACHE_FLUSH);
85 struct fd_ringbuffer *ring = ctx->batch->draw; local
92 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
93 OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
94 OUT_RING(ring, info->start);
96 OUT_PKT3(ring, CP_SET_CONSTANT, 2);
97 OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
98 OUT_RING(ring, 0x0000003b)
128 struct fd_ringbuffer *ring = ctx->batch->draw; local
[all...] |
| fd2_emit.c | 53 emit_constants(struct fd_ringbuffer *ring, uint32_t base,
94 OUT_PKT3(ring, CP_SET_CONSTANT, size + 1);
95 OUT_RING(ring, base);
97 OUT_RING(ring, *(dwords++));
109 OUT_PKT3(ring, CP_SET_CONSTANT, 5);
110 OUT_RING(ring, start_base + (4 * (shader->first_immediate + i)));
111 OUT_RING(ring, shader->immediates[i].val[0]);
112 OUT_RING(ring, shader->immediates[i].val[1]);
113 OUT_RING(ring, shader->immediates[i].val[2]);
114 OUT_RING(ring, shader->immediates[i].val[3])
187 struct fd_ringbuffer *ring = ctx->batch->draw; local
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| fd5_emit.c | 56 fd5_emit_const(struct fd_ringbuffer *ring, enum shader_t type,
74 OUT_PKT7(ring, CP_LOAD_STATE, 3 + sz);
75 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) |
81 OUT_RELOC(ring, bo, offset,
84 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
86 OUT_RING(ring, CP_LOAD_STATE_2_EXT_SRC_ADDR_HI(0));
90 OUT_RING(ring, dwords[i]);
95 fd5_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write,
103 OUT_PKT7(ring, CP_LOAD_STATE, 3 + (2 * anum));
104 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4)
[all...] |
| fd5_gmem.c | 46 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
95 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5);
96 OUT_RING(ring, A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
101 OUT_RING(ring, A5XX_RB_MRT_PITCH(stride));
102 OUT_RING(ring, A5XX_RB_MRT_ARRAY_PITCH(size));
104 OUT_RING(ring, base); /* RB_MRT[i].BASE_LO */
105 OUT_RING(ring, 0x00000000); /* RB_MRT[i].BASE_HI */
108 OUT_RELOCW(ring, rsc->bo, offset, 0, 0); /* BASE_LO/HI */
111 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1);
112 OUT_RING(ring, A5XX_SP_FS_MRT_REG_COLOR_FORMAT(format)
225 struct fd_ringbuffer *ring = batch->gmem; local
257 struct fd_ringbuffer *ring = batch->gmem; local
290 struct fd_ringbuffer *ring = batch->gmem; local
322 struct fd_ringbuffer *ring = batch->gmem; local
382 struct fd_ringbuffer *ring = batch->gmem; local
424 struct fd_ringbuffer *ring = batch->gmem; local
486 struct fd_ringbuffer *ring = batch->gmem; local
502 struct fd_ringbuffer *ring = batch->gmem; local
576 struct fd_ringbuffer *ring = batch->gmem; local
[all...] |
| fd5_emit.h | 95 fd5_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
98 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5);
99 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_LO */
100 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MIN_HI */
101 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_LO */
102 OUT_RING(ring, 0x00000000); /* UCHE_CACHE_INVALIDATE_MAX_HI */
103 OUT_RING(ring, 0x00000012); /* UCHE_CACHE_INVALIDATE */
104 fd_wfi(batch, ring);
108 fd5_set_render_mode(struct fd_context *ctx, struct fd_ringbuffer *ring,
112 emit_marker5(ring, 7)
140 struct fd_ringbuffer *ring = ctx->batch->draw; local
[all...] |
| fd5_draw.h | 40 fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
54 emit_marker5(ring, 7);
56 OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3);
61 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
64 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
66 OUT_RING(ring, instances); /* NumInstances */
67 OUT_RING(ring, count); /* NumIndices */
69 OUT_RING(ring, 0x0); /* XXX */
70 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
71 OUT_RING (ring, idx_size)
[all...] |
| fd5_program.h | 40 void fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit);
|
| /external/android-clat/ |
| ring.c | 16 * ring.c - packet ring buffer functions
28 #include "ring.h"
50 struct packet_ring *ring = &tunnel->ring; local
51 ring->numblocks = TP_NUM_BLOCKS;
53 int total_frames = TP_FRAMES * ring->numblocks;
58 .tp_block_nr = ring->numblocks, // Number of blocks.
67 size_t buflen = TP_BLOCK_SIZE * ring->numblocks;
68 ring->base = mmap(NULL, buflen, PROT_READ|PROT_WRITE, MAP_SHARED|MAP_LOCKED|MAP_POPULATE
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| fd4_emit.c | 58 fd4_emit_const(struct fd_ringbuffer *ring, enum shader_t type,
76 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz);
77 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) |
83 OUT_RELOC(ring, bo, offset,
86 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
91 OUT_RING(ring, dwords[i]);
96 fd4_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write,
104 OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum);
105 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/4) |
109 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0)
[all...] |
| fd4_gmem.c | 48 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
114 OUT_PKT0(ring, REG_A4XX_RB_MRT_BUF_INFO(i), 3);
115 OUT_RING(ring, A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
121 OUT_RING(ring, base);
122 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(stride));
124 OUT_RELOCW(ring, rsc->bo, offset, 0, 0);
129 OUT_RING(ring, A4XX_RB_MRT_CONTROL3_STRIDE(0));
153 struct fd_ringbuffer *ring = batch->gmem; local
171 OUT_PKT0(ring, REG_A4XX_RB_COPY_CONTROL, 4);
172 OUT_RING(ring, A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(MSAA_ONE)
192 struct fd_ringbuffer *ring = batch->gmem; local
304 struct fd_ringbuffer *ring = batch->gmem; local
330 struct fd_ringbuffer *ring = batch->gmem; local
526 struct fd_ringbuffer *ring = batch->gmem; local
563 struct fd_ringbuffer *ring = batch->gmem; local
601 struct fd_ringbuffer *ring = batch->gmem; local
664 struct fd_ringbuffer *ring = batch->gmem; local
710 struct fd_ringbuffer *ring = batch->gmem; local
759 struct fd_ringbuffer *ring = batch->gmem; local
[all...] |
| fd4_query.c | 51 occlusion_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring)
64 OUT_PKT3(ring, CP_SET_CONSTANT, 3);
65 OUT_RING(ring, CP_REG(REG_A4XX_RB_SAMPLE_COUNT_CONTROL) | 0x80000000);
66 OUT_RING(ring, HW_QUERY_BASE_REG);
67 OUT_RING(ring, A4XX_RB_SAMPLE_COUNT_CONTROL_COPY |
70 OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, 3);
71 OUT_RING(ring, DRAW4(DI_PT_POINTLIST_PSIZE, DI_SRC_SEL_AUTO_INDEX,
73 OUT_RING(ring, 1); /* NumInstances */
74 OUT_RING(ring, 0); /* NumIndices */
76 fd_event_write(batch, ring, ZPASS_DONE)
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| fd3_gmem.c | 47 emit_mrt(struct fd_ringbuffer *ring, unsigned nr_bufs,
111 OUT_PKT0(ring, REG_A3XX_RB_MRT_BUF_INFO(i), 2);
112 OUT_RING(ring, A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(format) |
118 OUT_RING(ring, A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(base));
120 OUT_RELOCW(ring, rsc->bo, offset, 0, -1);
123 OUT_PKT0(ring, REG_A3XX_SP_FS_IMAGE_OUTPUT_REG(i), 1);
124 OUT_RING(ring, COND((i < nr_bufs) && bufs[i],
162 struct fd_ringbuffer *ring = batch->gmem; local
172 OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 2);
173 OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RESOLVE_PASS)
316 struct fd_ringbuffer *ring = batch->gmem; local
353 struct fd_ringbuffer *ring = batch->gmem; local
478 struct fd_ringbuffer *ring = batch->gmem; local
535 struct fd_ringbuffer *ring = batch->gmem; local
724 struct fd_ringbuffer *ring = batch->gmem; local
768 struct fd_ringbuffer *ring = batch->gmem; local
798 struct fd_ringbuffer *ring = batch->gmem; local
923 struct fd_ringbuffer *ring = batch->gmem; local
963 struct fd_ringbuffer *ring = batch->gmem; local
978 struct fd_ringbuffer *ring = batch->gmem; local
[all...] |
| fd3_query.c | 49 occlusion_get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring)
57 OUT_PKT3(ring, CP_SET_CONSTANT, 3);
58 OUT_RING(ring, CP_REG(REG_A3XX_RB_SAMPLE_COUNT_ADDR) | 0x80000000);
59 OUT_RING(ring, HW_QUERY_BASE_REG);
60 OUT_RING(ring, samp->offset);
62 OUT_PKT0(ring, REG_A3XX_RB_SAMPLE_COUNT_CONTROL, 1);
63 OUT_RING(ring, A3XX_RB_SAMPLE_COUNT_CONTROL_COPY);
65 OUT_PKT3(ring, CP_DRAW_INDX, 3);
66 OUT_RING(ring, 0x00000000);
67 OUT_RING(ring, DRAW(DI_PT_POINTLIST_PSIZE, DI_SRC_SEL_AUTO_INDEX
[all...] |
| fd3_emit.c | 58 fd3_emit_const(struct fd_ringbuffer *ring, enum shader_t type,
76 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz);
77 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) |
83 OUT_RELOC(ring, bo, offset,
86 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
91 OUT_RING(ring, dwords[i]);
96 fd3_emit_const_bo(struct fd_ringbuffer *ring, enum shader_t type, boolean write,
104 OUT_PKT3(ring, CP_LOAD_STATE, 2 + anum);
105 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(regid/2) |
109 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0)
[all...] |
| fd3_program.c | 104 emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so)
127 OUT_PKT3(ring, CP_LOAD_STATE, 2 + sz);
128 OUT_RING(ring, CP_LOAD_STATE_0_DST_OFF(0) |
133 OUT_RING(ring, CP_LOAD_STATE_1_EXT_SRC_ADDR(0) |
136 OUT_RELOC(ring, so->bo, 0,
140 OUT_RING(ring, bin[i]);
145 fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
231 OUT_PKT0(ring, REG_A3XX_HLSQ_CONTROL_0_REG, 6);
232 OUT_RING(ring, A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(FOUR_QUADS) |
240 OUT_RING(ring, A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(TWO_QUADS)
[all...] |
| fd3_emit.h | 41 void fd3_emit_gmem_restore_tex(struct fd_ringbuffer *ring,
87 void fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit);
89 void fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
92 void fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring);
97 fd3_emit_cache_flush(struct fd_batch *batch, struct fd_ringbuffer *ring)
99 fd_wfi(batch, ring);
100 OUT_PKT0(ring, REG_A3XX_UCHE_CACHE_INVALIDATE0_REG, 2);
101 OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(0));
102 OUT_RING(ring, A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(0) |
|
| /external/mesa3d/src/gallium/drivers/freedreno/ |
| freedreno_util.h | 181 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
182 static inline void emit_marker5(struct fd_ringbuffer *ring, int scratch_idx);
185 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
188 DBG("ring[%p]: OUT_RING %04x: %08x", ring,
189 (uint32_t)(ring->cur - ring->last_start), data);
191 fd_ringbuffer_emit(ring, data);
196 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
200 DBG("ring[%p]: OUT_RINGP %04x: %08x", ring
[all...] |
| freedreno_draw.h | 45 fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
60 emit_marker(ring, 7);
64 OUT_PKT3(ring, CP_DRAW_INDX, 3);
65 OUT_RING(ring, 0x00000000);
66 OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
68 OUT_RING(ring, 0); /* NumIndices */
73 OUT_PKT0(ring, 0x2206, 1); /* A3XX_HLSQ_CONST_VSPRESV_RANGE_REG */
74 OUT_RING(ring, 0);
77 OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3);
78 OUT_RING(ring, 0x00000000); /* viz query info. *
[all...] |
| /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/Xen/io/ |
| console.h | 32 #define MASK_XENCONS_IDX(idx, ring) ((idx) & (sizeof(ring)-1))
|
