/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
r15-bad.s | 41 smmul r15, r2, r3 42 smmul r1, r15, r3 43 smmul r1, r2, r15
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r15-bad.l | 38 [^:]*:41: Error: r15 not allowed here -- `smmul r15,r2,r3' 39 [^:]*:42: Error: r15 not allowed here -- `smmul r1,r15,r3' 40 [^:]*:43: Error: r15 not allowed here -- `smmul r1,r2,r15'
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thumb2_bad_reg.s | 592 @ SMMUL 593 smmul r13, r0, r0 594 smmul r15, r0, r0 595 smmul r0, r13, r0 596 smmul r0, r15, r0 597 smmul r0, r0, r13 598 smmul r0, r0, r15
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arch7em.s | 121 smmul r0, r0, r0
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arch7em-bad.l | 104 [^:]*:121: Error: selected processor does not support Thumb mode `smmul r0,r0,r0'
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archv6.s | 106 smmul r1,r2,r3
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arch7em.d | 111 0[0-9a-f]+ <[^>]+> fb50 f000 smmul r0, r0, r0
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archv6.d | 109 0+194 <[^>]*> e751f312 ? smmul r1, r2, r3
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thumb2_bad_reg.l | 475 [^:]*:[0-9]+: Error: r13 not allowed here -- `smmul r13,r0,r0' 476 [^:]*:[0-9]+: Error: r15 not allowed here -- `smmul r15,r0,r0' 477 [^:]*:[0-9]+: Error: r13 not allowed here -- `smmul r0,r13,r0' 478 [^:]*:[0-9]+: Error: r15 not allowed here -- `smmul r0,r15,r0' 479 [^:]*:[0-9]+: Error: r13 not allowed here -- `smmul r0,r0,r13' 480 [^:]*:[0-9]+: Error: r15 not allowed here -- `smmul r0,r0,r15' [all...] |
thumb32.s | 691 smmul r0, r0, r0
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thumb32.d | [all...] |
/external/valgrind/none/tests/arm/ |
v6intARM.stdout.exp | [all...] |
/external/v8/src/arm/ |
disasm-arm.cc | [all...] |
assembler-arm.h | 931 void smmul(Register dst, Register src1, Register src2, Condition cond = al); [all...] |
macro-assembler-arm.cc | [all...] |
assembler-arm.cc | 1713 void Assembler::smmul(Register dst, Register src1, Register src2, function in class:v8::internal::Assembler [all...] |
/external/vixl/test/aarch32/ |
test-assembler-cond-rd-rn-rm-a32.cc | 67 M(smmul) \ 471 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-smmul.h" [all...] |
test-assembler-cond-rd-rn-rm-t32.cc | 66 M(smmul) \ 469 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-smmul.h" [all...] |
/external/vixl/src/aarch32/ |
assembler-aarch32.h | 3117 void smmul(Register rd, Register rn, Register rm) { smmul(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.h | 1031 void smmul(Condition cond, Register rd, Register rn, Register rm); [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
basic-arm-instructions.s | [all...] |
basic-thumb2-instructions.s | [all...] |
/external/v8/src/compiler/arm/ |
code-generator-arm.cc | [all...] |
/external/llvm/test/MC/ARM/ |
basic-arm-instructions.s | [all...] |
basic-thumb2-instructions.s | [all...] |