/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vec4_surface_builder.h | 32 src_reg 34 const src_reg &surface, const src_reg &addr, 39 emit_untyped_write(const vec4_builder &bld, const src_reg &surface, 40 const src_reg &addr, const src_reg &src, 44 src_reg 46 const src_reg &surface, const src_reg &addr, 47 const src_reg &src0, const src_reg &src1 [all...] |
gen6_gs_visitor.h | 73 src_reg vertex_output; 74 src_reg vertex_output_offset; 75 src_reg temp; 76 src_reg first_vertex; 77 src_reg prim_count; 78 src_reg primitive_id; 81 src_reg sol_prim_written; 82 src_reg svbi; 83 src_reg max_svbi; 84 src_reg destination_indices [all...] |
brw_vec4.h | 126 src_reg shader_start_time; 176 const src_reg &src0); 178 const src_reg &src0, const src_reg &src1); 180 const src_reg &src0, const src_reg &src1, 181 const src_reg &src2); 187 #define EMIT1(op) vec4_instruction *op(const dst_reg &, const src_reg &); 188 #define EMIT2(op) vec4_instruction *op(const dst_reg &, const src_reg &, const src_reg &) [all...] |
brw_vec4_surface_builder.cpp | 34 src_reg 35 emit_stride(const vec4_builder &bld, const src_reg &src, unsigned size, 50 return src_reg(dst); 60 src_reg 61 emit_insert(const vec4_builder &bld, const src_reg &src, 65 return src_reg(); 76 return emit_stride(bld, src_reg(tmp), n, has_simd4x2 ? 1 : 4, 1); 86 src_reg 87 emit_extract(const vec4_builder &bld, const src_reg src, 91 return src_reg(); [all...] |
brw_vec4_tcs.h | 61 const src_reg &vertex_index, 64 const src_reg &indirect_offset); 68 const src_reg &indirect_offset); 70 void emit_urb_write(const src_reg &value, unsigned writemask, 71 unsigned base_offset, const src_reg &indirect_offset); 82 src_reg invocation_id;
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test_vec4_cmod_propagation.cpp | 147 src_reg src0 = src_reg(v, glsl_type::float_type); 148 src_reg src1 = src_reg(v, glsl_type::float_type); 149 src_reg zero(brw_imm_f(0.0f)); 154 bld.CMP(dest_null, src_reg(dest), zero, BRW_CONDITIONAL_GE); 183 src_reg src0 = src_reg(v, glsl_type::float_type); 184 src_reg src1 = src_reg(v, glsl_type::float_type) [all...] |
test_vec4_register_coalesce.cpp | 130 src_reg something = src_reg(v, glsl_type::float_type); 139 v->emit(v->MOV(m0, src_reg(temp))); 149 src_reg something = src_reg(v, glsl_type::float_type); 161 src_reg src = src_reg(temp); 175 src_reg some_src_1 = src_reg(v, glsl_type::vec4_type); 176 src_reg some_src_2 = src_reg(v, glsl_type::vec4_type) [all...] |
brw_ir_vec4.h | 35 class src_reg : public backend_reg class in namespace:brw 38 DECLARE_RALLOC_CXX_OPERATORS(src_reg) 42 src_reg(enum brw_reg_file file, int nr, const glsl_type *type); 43 src_reg(); 44 src_reg(struct ::brw_reg reg); 46 bool equals(const src_reg &r) const; 48 src_reg(class vec4_visitor *v, const struct glsl_type *type); 49 src_reg(class vec4_visitor *v, const struct glsl_type *type, int size); 51 explicit src_reg(const dst_reg ®); 53 src_reg *reladdr [all...] |
brw_vec4_builder.h | 44 typedef brw::src_reg src_reg; typedef in class:brw::vec4_builder 246 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const 269 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 270 const src_reg &src1) const 290 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 291 const src_reg &src1, const src_reg &src2) const 336 emit_minmax(const dst_reg &dst, const src_reg &src0, 337 const src_reg &src1, brw_conditional_mod mod) cons [all...] |
brw_vec4_visitor.cpp | 32 const src_reg &src0, const src_reg &src1, 33 const src_reg &src2) 88 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 89 const src_reg &src1, const src_reg &src2) 96 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 97 const src_reg &src1) 103 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) 122 vec4_visitor::op(const dst_reg &dst, const src_reg &src0) 674 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type) function in class:brw::src_reg 690 src_reg::src_reg(class vec4_visitor *v, const struct glsl_type *type, int size) function in class:brw::src_reg [all...] |
brw_fs_builder.h | 44 typedef fs_reg src_reg; typedef in class:brw::fs_builder 236 src_reg 281 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) const 303 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 304 const src_reg &src1) const 324 emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, 325 const src_reg &src1, const src_reg &src2) const 348 emit(enum opcode opcode, const dst_reg &dst, const src_reg srcs[], 384 emit_minmax(const dst_reg &dst, const src_reg &src0 [all...] |
brw_vec4_tes.cpp | 125 input_read_header = src_reg(this, glsl_type::uvec4_type); 168 src_reg(brw_vec8_grf(1, 0)))); 173 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type), 177 swizzle(src_reg(ATTR, 1, glsl_type::vec4_type), 184 swizzle(src_reg(ATTR, 0, glsl_type::vec4_type), 188 src_reg(ATTR, 1, glsl_type::float_type))); 198 src_reg indirect_offset = get_indirect_offset(instr); 200 src_reg header = input_read_header; 207 header = src_reg(this, glsl_type::uvec4_type); 218 src_reg src = src_reg(ATTR, imm_offset, src_glsl_type) [all...] |
brw_vec4_gs_visitor.h | 70 src_reg vertex_count; 71 src_reg control_data_bits;
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gen6_gs_visitor.cpp | 64 this->vertex_output = src_reg(this, 68 this->vertex_output_offset = src_reg(this, glsl_type::uint_type); 82 this->temp = src_reg(this, glsl_type::uint_type); 90 this->first_vertex = src_reg(this, glsl_type::uint_type); 96 this->prim_count = src_reg(this, glsl_type::uint_type); 101 this->destination_indices = src_reg(this, glsl_type::uvec4_type); 103 this->sol_prim_written = src_reg(this, glsl_type::uint_type); 105 this->svbi = src_reg(this, glsl_type::uvec4_type); 107 this->max_svbi = src_reg(this, glsl_type::uvec4_type); 109 src_reg(retype(brw_vec1_grf(1, 4), BRW_REGISTER_TYPE_UD)))) [all...] |
brw_vec4_tcs.cpp | 89 invocation_id = src_reg(this, glsl_type::uint_type); 130 emit(SHADER_OPCODE_BARRIER, dst_null_ud(), src_reg(header)); 168 const src_reg &vertex_index, 171 const src_reg &indirect_offset) 184 inst = emit(VEC4_OPCODE_URB_READ, temp, src_reg(header)); 194 emit(MOV(dst, swizzle(src_reg(temp), BRW_SWIZZLE_WWWW))); 196 src_reg src = src_reg(temp); 206 const src_reg &indirect_offset) 216 vec4_instruction *read = emit(VEC4_OPCODE_URB_READ, dst, src_reg(header)) [all...] |
brw_vec4_gs_nir.cpp | 59 src_reg src; 70 src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] + 77 src = src_reg(tmp); 88 src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u32[0] + 133 src_reg invocation_id = 134 src_reg(nir_system_values[SYSTEM_VALUE_INVOCATION_ID]);
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brw_vec4_nir.cpp | 183 src_reg condition = get_nir_src(if_stmt->condition, BRW_REGISTER_TYPE_D, 1); 267 new(v->mem_ctx) src_reg(v->get_nir_src(*indirect, 302 src_reg 319 src_reg reg_as_src = src_reg(reg); 324 src_reg 331 src_reg 338 src_reg 350 return src_reg(); 410 src_reg src [all...] |
brw_vec4_tes.h | 62 src_reg input_read_header;
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test_vec4_copy_propagation.cpp | 131 v->emit(v->ADD(a, src_reg(a), src_reg(a))); 133 v->emit(v->MOV(b, swizzle(src_reg(a), BRW_SWIZZLE4(SWIZZLE_Y, 139 v->MOV(c, swizzle(src_reg(b), BRW_SWIZZLE4(SWIZZLE_Y, 160 v->emit(v->MOV(b, swizzle(src_reg(a), BRW_SWIZZLE4(SWIZZLE_X, 168 v->MOV(c, swizzle(src_reg(b), BRW_SWIZZLE4(SWIZZLE_W,
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_inline_literals.c | 111 struct rc_src_register * src_reg = local 114 if (src_reg->File != RC_FILE_CONSTANT) { 118 &c->Program.Constants.Constants[src_reg->Index]; 125 swz = GET_SWZ(src_reg->Swizzle, chan); 138 if (ret == -1 && src_reg->Abs) { 159 src_reg->File = RC_FILE_INLINE; 160 src_reg->Index = r300_float; 161 src_reg->Swizzle = new_swizzle; 162 src_reg->Negate = src_reg->Negate ^ negate_mask [all...] |
/external/libvpx/libvpx/vpx_dsp/x86/ |
variance_impl_avx2.c | 245 #define MERGE_WITH_SRC(src_reg, reg) \ 246 exp_src_lo = _mm256_unpacklo_epi8(src_reg, reg); \ 247 exp_src_hi = _mm256_unpackhi_epi8(src_reg, reg); 251 src_reg = _mm256_loadu_si256((__m256i const *)(src)); \ 254 #define AVG_NEXT_SRC(src_reg, size_stride) \ 257 src_reg = _mm256_avg_epu8(src_reg, src_next_reg); 259 #define MERGE_NEXT_SRC(src_reg, size_stride) \ 261 MERGE_WITH_SRC(src_reg, src_next_reg) 304 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi local 492 __m256i src_reg, dst_reg, exp_src_lo, exp_src_hi, exp_dst_lo, exp_dst_hi; local [all...] |
sad4d_avx2.c | 17 __m256i src_reg, ref0_reg, ref1_reg, ref2_reg, ref3_reg; local 33 src_reg = _mm256_loadu_si256((const __m256i *)src); 39 ref0_reg = _mm256_sad_epu8(ref0_reg, src_reg); 40 ref1_reg = _mm256_sad_epu8(ref1_reg, src_reg); 41 ref2_reg = _mm256_sad_epu8(ref2_reg, src_reg); 42 ref3_reg = _mm256_sad_epu8(ref3_reg, src_reg); 85 __m256i src_reg, srcnext_reg, ref0_reg, ref0next_reg; local 103 src_reg = _mm256_loadu_si256((const __m256i *)src); 114 ref0_reg = _mm256_sad_epu8(ref0_reg, src_reg); 115 ref1_reg = _mm256_sad_epu8(ref1_reg, src_reg); [all...] |
/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
ir3_cp.c | 325 struct ir3_register *src_reg = src->regs[1]; local 333 reg->array = src_reg->array; 336 reg->instr = ssa(src_reg); 346 struct ir3_register *src_reg = src->regs[1]; local 355 instr->regs[n + 1] = lower_immed(ctx, src_reg, new_flags); 388 if (src_reg->flags & IR3_REG_CONST) { 392 if ((src_reg->flags & IR3_REG_RELATIV) && 401 (src_reg->flags & IR3_REG_RELATIV) && 402 (src_reg->array.offset == 0)) 405 src_reg = ir3_reg_clone(instr->block->shader, src_reg) [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
rc_test_helpers.c | 142 struct rc_src_register * src_reg = &inst->U.I.SrcReg[src_index]; local 165 src_reg->Negate = RC_MASK_XYZW; 170 src_reg->Abs = 1; 175 src_reg->File = RC_FILE_TEMPORARY; 177 src_reg->File = RC_FILE_INPUT; 179 src_reg->File = RC_FILE_CONSTANT; 181 src_reg->File = RC_FILE_NONE; 186 src_reg->Index = strtol(tokens.Index.String, NULL, 10); 194 src_reg->Swizzle = RC_SWIZZLE_XYZW; 197 src_reg->Swizzle = RC_MAKE_SWIZZLE_SMEAR(RC_SWIZZLE_UNUSED) [all...] |
/external/mesa3d/src/mesa/program/ |
ir_to_mesa.cpp | 61 class src_reg; 68 class src_reg { class in namespace:__anon28749 70 src_reg(gl_register_file file, int index, const glsl_type *type) function in class:__anon28749::src_reg 82 src_reg() function in class:__anon28749::src_reg 91 explicit src_reg(dst_reg reg); 98 src_reg *reladdr; 119 explicit dst_reg(src_reg reg); 125 src_reg *reladdr; 130 src_reg::src_reg(dst_reg reg function in class:src_reg [all...] |