| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| 24k-triple-stores-3.s | 64 swl $2,4($sp)
65 swl $3,10($sp)
66 swl $4,17($sp)
70 swl $2,7($sp)
71 swl $3,12($sp)
72 swl $4,16($sp)
76 swl $2,0($sp)
77 swl $3,12($sp)
78 swl $4,23($sp)
82 swl $2,3($8
[all...] |
| 24k-triple-stores-2.s | 25 swl $2,0($sp)
26 swl $3,8($sp)
27 swl $4,16($sp)
28 swl $5,24($sp)
29 swl $6,0($sp)
|
| 24k-triple-stores-3.d | 56 b8: aba20004 swl v0,4\(sp\)
57 bc: aba3000a swl v1,10\(sp\)
59 c4: aba40011 swl a0,17\(sp\)
61 cc: aba20007 swl v0,7\(sp\)
62 d0: aba3000c swl v1,12\(sp\)
64 d8: aba40010 swl a0,16\(sp\)
66 e0: aba20000 swl v0,0\(sp\)
67 e4: aba3000c swl v1,12\(sp\)
69 ec: aba40017 swl a0,23\(sp\)
71 f4: a9020003 swl v0,3\(t0\
[all...] |
| 24k-triple-stores-2.d | 27 48: aba20000 swl v0,0\(sp\)
28 4c: aba30008 swl v1,8\(sp\)
30 54: aba40010 swl a0,16\(sp\)
31 58: aba50018 swl a1,24\(sp\)
33 60: aba60000 swl a2,0\(sp\)
|
| usw.d | 10 0+0000 <[^>]*> swl a0,[03]\(zero\)
12 0+0008 <[^>]*> swl a0,[14]\(zero\)
15 0+0014 <[^>]*> swl a0,[03]\(at\)
17 0+001c <[^>]*> swl a0,-3276[58]\(zero\)
20 0+0028 <[^>]*> swl a0,[03]\(at\)
24 0+0038 <[^>]*> swl a0,[03]\(at\)
26 0+0040 <[^>]*> swl a0,[03]\(a1\)
28 0+0048 <[^>]*> swl a0,[14]\(a1\)
34 0+0058 <[^>]*> swl a0,[03]\(at\)
40 0+0068 <[^>]*> swl a0,[03]\(at\
[all...] |
| micromips@24k-triple-stores-3.d | 51 *[0-9a-f]+: 605d 8004 swl v0,4\(sp\)
52 *[0-9a-f]+: 607d 800a swl v1,10\(sp\)
53 *[0-9a-f]+: 609d 8011 swl a0,17\(sp\)
55 *[0-9a-f]+: 605d 8007 swl v0,7\(sp\)
56 *[0-9a-f]+: 607d 800c swl v1,12\(sp\)
57 *[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
59 *[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
60 *[0-9a-f]+: 607d 800c swl v1,12\(sp\)
61 *[0-9a-f]+: 609d 8017 swl a0,23\(sp\)
63 *[0-9a-f]+: 6048 8003 swl v0,3\(t0\
[all...] |
| micromips-warn-branch-delay.s | 12 swl $2,0($3)
|
| micromips@24k-triple-stores-2.d | 27 *[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
28 *[0-9a-f]+: 607d 8008 swl v1,8\(sp\)
29 *[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
30 *[0-9a-f]+: 60bd 8018 swl a1,24\(sp\)
31 *[0-9a-f]+: 60dd 8000 swl a2,0\(sp\)
|
| 24k-triple-stores-1.s | 29 swl $2,0($sp)
30 swl $3,8($sp)
31 swl $4,16($sp)
32 swl $5,24($sp)
33 swl $6,32($sp)
|
| ldstla-eabi64.d | 424 .* swl a0,0\(at\)
429 .* swl a0,0\(at\)
432 .* swl a0,0\(at\)
436 .* swl a0,0\(at\)
440 .* swl a0,0\(at\)
445 .* swl a0,0\(at\)
449 .* swl a0,0\(at\)
454 .* swl a0,0\(at\)
462 .* swl a0,0\(at\)
471 .* swl a0,0\(at\
[all...] |
| 24k-triple-stores-6.d | 9 0: abbf0050 swl ra,80\(sp\)
11 8: abb30058 swl s3,88\(sp\)
13 10: abbe0060 swl s8,96\(sp\)
|
| ldstla-n64-sym32.d | 640 .* swl a0,0\(at\)
645 .* swl a0,0\(at\)
648 .* swl a0,0\(at\)
652 .* swl a0,0\(at\)
656 .* swl a0,0\(at\)
661 .* swl a0,0\(at\)
665 .* swl a0,0\(at\)
670 .* swl a0,0\(at\)
678 .* swl a0,0\(at\)
687 .* swl a0,0\(at\
[all...] |
| vxworks1-el.d | 63 .*: a8240003 swl a0,3\(at\)
70 .*: a8240003 swl a0,3\(at\)
|
| vxworks1.d | 62 .*: a8240000 swl a0,0\(at\)
69 .*: a8240000 swl a0,0\(at\)
|
| micromips@24k-triple-stores-6.d | 11 *[0-9a-f]+: 63fd 8050 swl ra,80\(sp\)
13 *[0-9a-f]+: 627d 8058 swl s3,88\(sp\)
15 *[0-9a-f]+: 63dd 8060 swl s8,96\(sp\)
|
| 24k-triple-stores-1.d | 37 70: aba20000 swl v0,0\(sp\)
38 74: aba30008 swl v1,8\(sp\)
40 7c: aba40010 swl a0,16\(sp\)
41 80: aba50018 swl a1,24\(sp\)
43 88: aba60020 swl a2,32\(sp\)
|
| micromips@24k-triple-stores-1.d | 31 *[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
32 *[0-9a-f]+: 607d 8008 swl v1,8\(sp\)
33 *[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
34 *[0-9a-f]+: 60bd 8018 swl a1,24\(sp\)
35 *[0-9a-f]+: 60dd 8020 swl a2,32\(sp\)
|
| micromips-warn-branch-delay.d | 17 [ 0-9a-f]+: 6043 8000 swl \$2,0\(\$3\)
|
| vxworks1-xgot-el.d | 90 .*: a8240003 swl a0,3\(at\)
100 .*: a8240003 swl a0,3\(at\)
|
| /external/llvm/test/MC/Mips/ |
| micromips-loadstore-unaligned.s | 14 # CHECK-EL: swl $4, 16($5) # encoding: [0x85,0x60,0x10,0x80]
21 # CHECK-EB: swl $4, 16($5) # encoding: [0x60,0x85,0x80,0x10]
25 swl $4, 16($5)
|
| mips-memory-instructions.s | 13 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
20 swl $4, 16($5)
|
| /system/core/logd/ |
| CommandListener.h | 31 CommandListener(LogBuffer* buf, LogReader* reader, LogListener* swl);
43 ShutdownCmd(LogReader* reader, LogListener* swl);
|
| /external/valgrind/none/tests/mips32/ |
| LoadStore.stdout.exp | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e00
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e31
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e7f
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e80
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x8
[all...] |
| LoadStore1.stdout.exp | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x8000000
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips1-wrong-error.s | 12 swl $15,13694($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
