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/external/llvm/test/MC/X86/
x86-64-avx512cd.s	135 // CHECK: vplzcntd (%rcx){1to16}, %zmm25 137 vplzcntd (%rcx){1to16}, %zmm25 155 // CHECK: vplzcntd 508(%rdx){1to16}, %zmm25 157 vplzcntd 508(%rdx){1to16}, %zmm25 159 // CHECK: vplzcntd 512(%rdx){1to16}, %zmm25 161 vplzcntd 512(%rdx){1to16}, %zmm25 163 // CHECK: vplzcntd -512(%rdx){1to16}, %zmm25 165 vplzcntd -512(%rdx){1to16}, %zmm25 167 // CHECK: vplzcntd -516(%rdx){1to16}, %zmm25 169 vplzcntd -516(%rdx){1to16}, %zmm25     [all...]
intel-syntax-avx512.s	127 // CHECK: vcmpps k2, zmm17, dword ptr [rcx]{1to16}, 123 129 vcmpps k2,zmm17,DWORD PTR [rcx]{1to16},0x7b 147 // CHECK: vcmpps k2, zmm17, dword ptr [rdx + 508]{1to16}, 123 149 vcmpps k2,zmm17,DWORD PTR [rdx+0x1fc]{1to16},0x7b 151 // CHECK: vcmpps k2, zmm17, dword ptr [rdx + 512]{1to16}, 123 153 vcmpps k2,zmm17,DWORD PTR [rdx+0x200]{1to16},0x7b 155 // CHECK: vcmpps k2, zmm17, dword ptr [rdx - 512]{1to16}, 123 157 vcmpps k2,zmm17,DWORD PTR [rdx-0x200]{1to16},0x7b 159 // CHECK: vcmpps k2, zmm17, dword ptr [rdx - 516]{1to16}, 123 161 vcmpps k2,zmm17,DWORD PTR [rdx-0x204]{1to16},0x7     [all...]
avx512-encodings.s	79 // CHECK: vaddps (%rcx){1to16}, %zmm13, %zmm18 81 vaddps (%rcx){1to16}, %zmm13, %zmm18 99 // CHECK: vaddps 508(%rdx){1to16}, %zmm13, %zmm18 101 vaddps 508(%rdx){1to16}, %zmm13, %zmm18 103 // CHECK: vaddps 512(%rdx){1to16}, %zmm13, %zmm18 105 vaddps 512(%rdx){1to16}, %zmm13, %zmm18 107 // CHECK: vaddps -512(%rdx){1to16}, %zmm13, %zmm18 109 vaddps -512(%rdx){1to16}, %zmm13, %zmm18 111 // CHECK: vaddps -516(%rdx){1to16}, %zmm13, %zmm18 113 vaddps -516(%rdx){1to16}, %zmm13, %zmm1     [all...]
x86-64-avx512dq.s	207 // CHECK: vandps (%rcx){1to16}, %zmm22, %zmm17 209 vandps (%rcx){1to16}, %zmm22, %zmm17 227 // CHECK: vandps 508(%rdx){1to16}, %zmm22, %zmm17 229 vandps 508(%rdx){1to16}, %zmm22, %zmm17 231 // CHECK: vandps 512(%rdx){1to16}, %zmm22, %zmm17 233 vandps 512(%rdx){1to16}, %zmm22, %zmm17 235 // CHECK: vandps -512(%rdx){1to16}, %zmm22, %zmm17 237 vandps -512(%rdx){1to16}, %zmm22, %zmm17 239 // CHECK: vandps -516(%rdx){1to16}, %zmm22, %zmm17 241 vandps -516(%rdx){1to16}, %zmm22, %zmm1     [all...]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
avx512cd.s	12 vpconflictd (%eax){1to16}, %zmm6 # AVX512CD 17 vpconflictd 508(%edx){1to16}, %zmm6 # AVX512CD Disp8 18 vpconflictd 512(%edx){1to16}, %zmm6 # AVX512CD 19 vpconflictd -512(%edx){1to16}, %zmm6 # AVX512CD Disp8 20 vpconflictd -516(%edx){1to16}, %zmm6 # AVX512CD 42 vplzcntd (%eax){1to16}, %zmm6 # AVX512CD 47 vplzcntd 508(%edx){1to16}, %zmm6 # AVX512CD Disp8 48 vplzcntd 512(%edx){1to16}, %zmm6 # AVX512CD 49 vplzcntd -512(%edx){1to16}, %zmm6 # AVX512CD Disp8 50 vplzcntd -516(%edx){1to16}, %zmm6 # AVX512C     [all...]
x86-64-avx512cd.s	12 vpconflictd (%rcx){1to16}, %zmm30 # AVX512CD 17 vpconflictd 508(%rdx){1to16}, %zmm30 # AVX512CD Disp8 18 vpconflictd 512(%rdx){1to16}, %zmm30 # AVX512CD 19 vpconflictd -512(%rdx){1to16}, %zmm30 # AVX512CD Disp8 20 vpconflictd -516(%rdx){1to16}, %zmm30 # AVX512CD 42 vplzcntd (%rcx){1to16}, %zmm30 # AVX512CD 47 vplzcntd 508(%rdx){1to16}, %zmm30 # AVX512CD Disp8 48 vplzcntd 512(%rdx){1to16}, %zmm30 # AVX512CD 49 vplzcntd -512(%rdx){1to16}, %zmm30 # AVX512CD Disp8 50 vplzcntd -516(%rdx){1to16}, %zmm30 # AVX512C     [all...]
inval-avx512f.s	13 vcvtps2pd (%eax){1to16}, %zmm1 33 vcvtps2pd zmm1, [eax]{1to16} 45 vaddps zmm2, zmm1, QWORD PTR [eax]{1to16} 47 vaddpd zmm2, zmm1, DWORD PTR [eax]{1to16} 48 vaddps zmm2, zmm1, ZMMWORD PTR [eax]{1to16}
x86-64-inval-avx512f.s	13 vcvtps2pd (%rax){1to16}, %zmm1 32 vcvtps2pd zmm1, [rax]{1to16} 43 vaddps zmm2, zmm1, QWORD PTR [rax]{1to16} 45 vaddpd zmm2, zmm1, DWORD PTR [rax]{1to16} 46 vaddps zmm2, zmm1, ZMMWORD PTR [rax]{1to16}
inval-avx512f.l	57 [ ]*13[ ]+vcvtps2pd \(%eax\)\{1to16\}, %zmm1 77 [ ]*33[ ]+vcvtps2pd zmm1, \[eax\]\{1to16\} 89 [ ]*45[ ]+vaddps zmm2, zmm1, QWORD PTR \[eax\]\{1to16\} 91 [ ]*47[ ]+vaddpd zmm2, zmm1, DWORD PTR \[eax\]\{1to16\} 92 [ ]*48[ ]+vaddps zmm2, zmm1, ZMMWORD PTR \[eax\]\{1to16\}
x86-64-inval-avx512f.l	55 [ ]*13[ ]+vcvtps2pd \(%rax\)\{1to16\}, %zmm1 74 [ ]*32[ ]+vcvtps2pd zmm1, \[rax\]\{1to16\} 85 [ ]*43[ ]+vaddps zmm2, zmm1, QWORD PTR \[rax\]\{1to16\} 87 [ ]*45[ ]+vaddpd zmm2, zmm1, DWORD PTR \[rax\]\{1to16\} 88 [ ]*46[ ]+vaddps zmm2, zmm1, ZMMWORD PTR \[rax\]\{1to16\}
avx512f.s	35 vaddps (%eax){1to16}, %zmm5, %zmm6 # AVX512F 40 vaddps 508(%edx){1to16}, %zmm5, %zmm6 # AVX512F Disp8 41 vaddps 512(%edx){1to16}, %zmm5, %zmm6 # AVX512F 42 vaddps -512(%edx){1to16}, %zmm5, %zmm6 # AVX512F Disp8 43 vaddps -516(%edx){1to16}, %zmm5, %zmm6 # AVX512F 77 valignd $123, (%eax){1to16}, %zmm5, %zmm6 # AVX512F 82 valignd $123, 508(%edx){1to16}, %zmm5, %zmm6 # AVX512F Disp8 83 valignd $123, 512(%edx){1to16}, %zmm5, %zmm6 # AVX512F 84 valignd $123, -512(%edx){1to16}, %zmm5, %zmm6 # AVX512F Disp8 85 valignd $123, -516(%edx){1to16}, %zmm5, %zmm6 # AVX512     [all...]
x86-64-avx512f.s	35 vaddps (%rcx){1to16}, %zmm29, %zmm30 # AVX512F 40 vaddps 508(%rdx){1to16}, %zmm29, %zmm30 # AVX512F Disp8 41 vaddps 512(%rdx){1to16}, %zmm29, %zmm30 # AVX512F 42 vaddps -512(%rdx){1to16}, %zmm29, %zmm30 # AVX512F Disp8 43 vaddps -516(%rdx){1to16}, %zmm29, %zmm30 # AVX512F 77 valignd $123, (%rcx){1to16}, %zmm29, %zmm30 # AVX512F 82 valignd $123, 508(%rdx){1to16}, %zmm29, %zmm30 # AVX512F Disp8 83 valignd $123, 512(%rdx){1to16}, %zmm29, %zmm30 # AVX512F 84 valignd $123, -512(%rdx){1to16}, %zmm29, %zmm30 # AVX512F Disp8 85 valignd $123, -516(%rdx){1to16}, %zmm29, %zmm30 # AVX512     [all...]
avx512cd.d	16 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 30 vpconflictd \(%eax\)\{1to16\},%zmm6 21 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 72 7f vpconflictd 0x1fc\(%edx\)\{1to16\},%zmm6 22 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 b2 00 02 00 00 vpconflictd 0x200\(%edx\)\{1to16\},%zmm6 23 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 72 80 vpconflictd -0x200\(%edx\)\{1to16\},%zmm6 24 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 b2 fc fd ff ff vpconflictd -0x204\(%edx\)\{1to16\},%zmm6 44 [ ]*[a-f0-9]+: 62 f2 7d 58 44 30 vplzcntd \(%eax\)\{1to16\},%zmm6 49 [ ]*[a-f0-9]+: 62 f2 7d 58 44 72 7f vplzcntd 0x1fc\(%edx\)\{1to16\},%zmm6 50 [ ]*[a-f0-9]+: 62 f2 7d 58 44 b2 00 02 00 00 vplzcntd 0x200\(%edx\)\{1to16\},%zmm6 51 [ ]*[a-f0-9]+: 62 f2 7d 58 44 72 80 vplzcntd -0x200\(%edx\)\{1to16\},%zmm6 52 [ ]*[a-f0-9]+: 62 f2 7d 58 44 b2 fc fd ff ff vplzcntd -0x204\(%edx\)\{1to16\},%zmm     [all...]
x86-64-avx512cd-intel.d	17 [ ]*[a-f0-9]+: 62 62 7d 58 c4 31 vpconflictd zmm30,DWORD PTR \[rcx\]\{1to16\} 22 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 7f vpconflictd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 23 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 00 02 00 00 vpconflictd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\} 24 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 80 vpconflictd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\} 25 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 fc fd ff ff vpconflictd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\} 45 [ ]*[a-f0-9]+: 62 62 7d 58 44 31 vplzcntd zmm30,DWORD PTR \[rcx\]\{1to16\} 50 [ ]*[a-f0-9]+: 62 62 7d 58 44 72 7f vplzcntd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 51 [ ]*[a-f0-9]+: 62 62 7d 58 44 b2 00 02 00 00 vplzcntd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\} 52 [ ]*[a-f0-9]+: 62 62 7d 58 44 72 80 vplzcntd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\} 53 [ ]*[a-f0-9]+: 62 62 7d 58 44 b2 fc fd ff ff vplzcntd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\}     [all...]
x86-64-avx512cd.d	16 [ ]*[a-f0-9]+: 62 62 7d 58 c4 31 vpconflictd \(%rcx\)\{1to16\},%zmm30 21 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 7f vpconflictd 0x1fc\(%rdx\)\{1to16\},%zmm30 22 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 00 02 00 00 vpconflictd 0x200\(%rdx\)\{1to16\},%zmm30 23 [ ]*[a-f0-9]+: 62 62 7d 58 c4 72 80 vpconflictd -0x200\(%rdx\)\{1to16\},%zmm30 24 [ ]*[a-f0-9]+: 62 62 7d 58 c4 b2 fc fd ff ff vpconflictd -0x204\(%rdx\)\{1to16\},%zmm30 44 [ ]*[a-f0-9]+: 62 62 7d 58 44 31 vplzcntd \(%rcx\)\{1to16\},%zmm30 49 [ ]*[a-f0-9]+: 62 62 7d 58 44 72 7f vplzcntd 0x1fc\(%rdx\)\{1to16\},%zmm30 50 [ ]*[a-f0-9]+: 62 62 7d 58 44 b2 00 02 00 00 vplzcntd 0x200\(%rdx\)\{1to16\},%zmm30 51 [ ]*[a-f0-9]+: 62 62 7d 58 44 72 80 vplzcntd -0x200\(%rdx\)\{1to16\},%zmm30 52 [ ]*[a-f0-9]+: 62 62 7d 58 44 b2 fc fd ff ff vplzcntd -0x204\(%rdx\)\{1to16\},%zmm3     [all...]
avx512er.s	11 vexp2ps (%eax){1to16}, %zmm6 # AVX512ER 16 vexp2ps 508(%edx){1to16}, %zmm6 # AVX512ER Disp8 17 vexp2ps 512(%edx){1to16}, %zmm6 # AVX512ER 18 vexp2ps -512(%edx){1to16}, %zmm6 # AVX512ER Disp8 19 vexp2ps -516(%edx){1to16}, %zmm6 # AVX512ER 41 vrcp28ps (%eax){1to16}, %zmm6 # AVX512ER 46 vrcp28ps 508(%edx){1to16}, %zmm6 # AVX512ER Disp8 47 vrcp28ps 512(%edx){1to16}, %zmm6 # AVX512ER 48 vrcp28ps -512(%edx){1to16}, %zmm6 # AVX512ER Disp8 49 vrcp28ps -516(%edx){1to16}, %zmm6 # AVX512E     [all...]
x86-64-avx512er.s	11 vexp2ps (%rcx){1to16}, %zmm30 # AVX512ER 16 vexp2ps 508(%rdx){1to16}, %zmm30 # AVX512ER Disp8 17 vexp2ps 512(%rdx){1to16}, %zmm30 # AVX512ER 18 vexp2ps -512(%rdx){1to16}, %zmm30 # AVX512ER Disp8 19 vexp2ps -516(%rdx){1to16}, %zmm30 # AVX512ER 41 vrcp28ps (%rcx){1to16}, %zmm30 # AVX512ER 46 vrcp28ps 508(%rdx){1to16}, %zmm30 # AVX512ER Disp8 47 vrcp28ps 512(%rdx){1to16}, %zmm30 # AVX512ER 48 vrcp28ps -512(%rdx){1to16}, %zmm30 # AVX512ER Disp8 49 vrcp28ps -516(%rdx){1to16}, %zmm30 # AVX512E     [all...]
x86-64-avx512er.d	15 [ ]*[a-f0-9]+: 62 62 7d 58 c8 31 vexp2ps \(%rcx\)\{1to16\},%zmm30 20 [ ]*[a-f0-9]+: 62 62 7d 58 c8 72 7f vexp2ps 0x1fc\(%rdx\)\{1to16\},%zmm30 21 [ ]*[a-f0-9]+: 62 62 7d 58 c8 b2 00 02 00 00 vexp2ps 0x200\(%rdx\)\{1to16\},%zmm30 22 [ ]*[a-f0-9]+: 62 62 7d 58 c8 72 80 vexp2ps -0x200\(%rdx\)\{1to16\},%zmm30 23 [ ]*[a-f0-9]+: 62 62 7d 58 c8 b2 fc fd ff ff vexp2ps -0x204\(%rdx\)\{1to16\},%zmm30 43 [ ]*[a-f0-9]+: 62 62 7d 58 ca 31 vrcp28ps \(%rcx\)\{1to16\},%zmm30 48 [ ]*[a-f0-9]+: 62 62 7d 58 ca 72 7f vrcp28ps 0x1fc\(%rdx\)\{1to16\},%zmm30 49 [ ]*[a-f0-9]+: 62 62 7d 58 ca b2 00 02 00 00 vrcp28ps 0x200\(%rdx\)\{1to16\},%zmm30 50 [ ]*[a-f0-9]+: 62 62 7d 58 ca 72 80 vrcp28ps -0x200\(%rdx\)\{1to16\},%zmm30 51 [ ]*[a-f0-9]+: 62 62 7d 58 ca b2 fc fd ff ff vrcp28ps -0x204\(%rdx\)\{1to16\},%zmm3     [all...]
avx512cd-intel.d	17 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 30 vpconflictd zmm6,DWORD PTR \[eax\]\{1to16\} 22 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 72 7f vpconflictd zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\} 23 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 b2 00 02 00 00 vpconflictd zmm6,DWORD PTR \[edx\+0x200\]\{1to16\} 24 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 72 80 vpconflictd zmm6,DWORD PTR \[edx-0x200\]\{1to16\} 25 [ ]*[a-f0-9]+: 62 f2 7d 58 c4 b2 fc fd ff ff vpconflictd zmm6,DWORD PTR \[edx-0x204\]\{1to16\} 45 [ ]*[a-f0-9]+: 62 f2 7d 58 44 30 vplzcntd zmm6,DWORD PTR \[eax\]\{1to16\} 50 [ ]*[a-f0-9]+: 62 f2 7d 58 44 72 7f vplzcntd zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\} 51 [ ]*[a-f0-9]+: 62 f2 7d 58 44 b2 00 02 00 00 vplzcntd zmm6,DWORD PTR \[edx\+0x200\]\{1to16\} 52 [ ]*[a-f0-9]+: 62 f2 7d 58 44 72 80 vplzcntd zmm6,DWORD PTR \[edx-0x200\]\{1to16\} 53 [ ]*[a-f0-9]+: 62 f2 7d 58 44 b2 fc fd ff ff vplzcntd zmm6,DWORD PTR \[edx-0x204\]\{1to16\}     [all...]
x86-64-avx512f.d	38 [ ]*[a-f0-9]+: 62 61 14 50 58 31 vaddps \(%rcx\)\{1to16\},%zmm29,%zmm30 43 [ ]*[a-f0-9]+: 62 61 14 50 58 72 7f vaddps 0x1fc\(%rdx\)\{1to16\},%zmm29,%zmm30 44 [ ]*[a-f0-9]+: 62 61 14 50 58 b2 00 02 00 00 vaddps 0x200\(%rdx\)\{1to16\},%zmm29,%zmm30 45 [ ]*[a-f0-9]+: 62 61 14 50 58 72 80 vaddps -0x200\(%rdx\)\{1to16\},%zmm29,%zmm30 46 [ ]*[a-f0-9]+: 62 61 14 50 58 b2 fc fd ff ff vaddps -0x204\(%rdx\)\{1to16\},%zmm29,%zmm30 77 [ ]*[a-f0-9]+: 62 63 15 50 03 31 7b valignd \$0x7b,\(%rcx\)\{1to16\},%zmm29,%zmm30 82 [ ]*[a-f0-9]+: 62 63 15 50 03 72 7f 7b valignd \$0x7b,0x1fc\(%rdx\)\{1to16\},%zmm29,%zmm30 83 [ ]*[a-f0-9]+: 62 63 15 50 03 b2 00 02 00 00 7b valignd \$0x7b,0x200\(%rdx\)\{1to16\},%zmm29,%zmm30 84 [ ]*[a-f0-9]+: 62 63 15 50 03 72 80 7b valignd \$0x7b,-0x200\(%rdx\)\{1to16\},%zmm29,%zmm30 85 [ ]*[a-f0-9]+: 62 63 15 50 03 b2 fc fd ff ff 7b valignd \$0x7b,-0x204\(%rdx\)\{1to16\},%zmm29,%zmm3     [all...]
avx512dq.s	218 vfpclasspsz $123, (%eax){1to16}, %k5 # AVX512DQ 223 vfpclasspsz $123, 508(%edx){1to16}, %k5 # AVX512DQ Disp8 224 vfpclasspsz $123, 512(%edx){1to16}, %k5 # AVX512DQ 225 vfpclasspsz $123, -512(%edx){1to16}, %k5 # AVX512DQ Disp8 226 vfpclasspsz $123, -516(%edx){1to16}, %k5 # AVX512DQ 327 vrangeps $123, (%eax){1to16}, %zmm5, %zmm6 # AVX512DQ 332 vrangeps $123, 508(%edx){1to16}, %zmm5, %zmm6 # AVX512DQ Disp8 333 vrangeps $123, 512(%edx){1to16}, %zmm5, %zmm6 # AVX512DQ 334 vrangeps $123, -512(%edx){1to16}, %zmm5, %zmm6 # AVX512DQ Disp8 335 vrangeps $123, -516(%edx){1to16}, %zmm5, %zmm6 # AVX512D     [all...]
x86-64-avx512dq.s	226 vfpclasspsz $123, (%rcx){1to16}, %k5 # AVX512DQ 231 vfpclasspsz $123, 508(%rdx){1to16}, %k5 # AVX512DQ Disp8 232 vfpclasspsz $123, 512(%rdx){1to16}, %k5 # AVX512DQ 233 vfpclasspsz $123, -512(%rdx){1to16}, %k5 # AVX512DQ Disp8 234 vfpclasspsz $123, -516(%rdx){1to16}, %k5 # AVX512DQ 379 vrangeps $123, (%rcx){1to16}, %zmm29, %zmm30 # AVX512DQ 384 vrangeps $123, 508(%rdx){1to16}, %zmm29, %zmm30 # AVX512DQ Disp8 385 vrangeps $123, 512(%rdx){1to16}, %zmm29, %zmm30 # AVX512DQ 386 vrangeps $123, -512(%rdx){1to16}, %zmm29, %zmm30 # AVX512DQ Disp8 387 vrangeps $123, -516(%rdx){1to16}, %zmm29, %zmm30 # AVX512D     [all...]
avx512f.d	38 [ ]*[a-f0-9]+: 62 f1 54 58 58 30 vaddps \(%eax\)\{1to16\},%zmm5,%zmm6 43 [ ]*[a-f0-9]+: 62 f1 54 58 58 72 7f vaddps 0x1fc\(%edx\)\{1to16\},%zmm5,%zmm6 44 [ ]*[a-f0-9]+: 62 f1 54 58 58 b2 00 02 00 00 vaddps 0x200\(%edx\)\{1to16\},%zmm5,%zmm6 45 [ ]*[a-f0-9]+: 62 f1 54 58 58 72 80 vaddps -0x200\(%edx\)\{1to16\},%zmm5,%zmm6 46 [ ]*[a-f0-9]+: 62 f1 54 58 58 b2 fc fd ff ff vaddps -0x204\(%edx\)\{1to16\},%zmm5,%zmm6 77 [ ]*[a-f0-9]+: 62 f3 55 58 03 30 7b valignd \$0x7b,\(%eax\)\{1to16\},%zmm5,%zmm6 82 [ ]*[a-f0-9]+: 62 f3 55 58 03 72 7f 7b valignd \$0x7b,0x1fc\(%edx\)\{1to16\},%zmm5,%zmm6 83 [ ]*[a-f0-9]+: 62 f3 55 58 03 b2 00 02 00 00 7b valignd \$0x7b,0x200\(%edx\)\{1to16\},%zmm5,%zmm6 84 [ ]*[a-f0-9]+: 62 f3 55 58 03 72 80 7b valignd \$0x7b,-0x200\(%edx\)\{1to16\},%zmm5,%zmm6 85 [ ]*[a-f0-9]+: 62 f3 55 58 03 b2 fc fd ff ff 7b valignd \$0x7b,-0x204\(%edx\)\{1to16\},%zmm5,%zmm     [all...]
x86-64-avx512f-intel.d	39 [ ]*[a-f0-9]+: 62 61 14 50 58 31 vaddps zmm30,zmm29,DWORD PTR \[rcx\]\{1to16\} 44 [ ]*[a-f0-9]+: 62 61 14 50 58 72 7f vaddps zmm30,zmm29,DWORD PTR \[rdx\+0x1fc\]\{1to16\} 45 [ ]*[a-f0-9]+: 62 61 14 50 58 b2 00 02 00 00 vaddps zmm30,zmm29,DWORD PTR \[rdx\+0x200\]\{1to16\} 46 [ ]*[a-f0-9]+: 62 61 14 50 58 72 80 vaddps zmm30,zmm29,DWORD PTR \[rdx-0x200\]\{1to16\} 47 [ ]*[a-f0-9]+: 62 61 14 50 58 b2 fc fd ff ff vaddps zmm30,zmm29,DWORD PTR \[rdx-0x204\]\{1to16\} 78 [ ]*[a-f0-9]+: 62 63 15 50 03 31 7b valignd zmm30,zmm29,DWORD PTR \[rcx\]\{1to16\},0x7b 83 [ ]*[a-f0-9]+: 62 63 15 50 03 72 7f 7b valignd zmm30,zmm29,DWORD PTR \[rdx\+0x1fc\]\{1to16\},0x7b 84 [ ]*[a-f0-9]+: 62 63 15 50 03 b2 00 02 00 00 7b valignd zmm30,zmm29,DWORD PTR \[rdx\+0x200\]\{1to16\},0x7b 85 [ ]*[a-f0-9]+: 62 63 15 50 03 72 80 7b valignd zmm30,zmm29,DWORD PTR \[rdx-0x200\]\{1to16\},0x7b 86 [ ]*[a-f0-9]+: 62 63 15 50 03 b2 fc fd ff ff 7b valignd zmm30,zmm29,DWORD PTR \[rdx-0x204\]\{1to16\},0x7     [all...]
avx512er-intel.d	16 [ ]*[a-f0-9]+: 62 f2 7d 58 c8 30 vexp2ps zmm6,DWORD PTR \[eax\]\{1to16\} 21 [ ]*[a-f0-9]+: 62 f2 7d 58 c8 72 7f vexp2ps zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\} 22 [ ]*[a-f0-9]+: 62 f2 7d 58 c8 b2 00 02 00 00 vexp2ps zmm6,DWORD PTR \[edx\+0x200\]\{1to16\} 23 [ ]*[a-f0-9]+: 62 f2 7d 58 c8 72 80 vexp2ps zmm6,DWORD PTR \[edx-0x200\]\{1to16\} 24 [ ]*[a-f0-9]+: 62 f2 7d 58 c8 b2 fc fd ff ff vexp2ps zmm6,DWORD PTR \[edx-0x204\]\{1to16\} 44 [ ]*[a-f0-9]+: 62 f2 7d 58 ca 30 vrcp28ps zmm6,DWORD PTR \[eax\]\{1to16\} 49 [ ]*[a-f0-9]+: 62 f2 7d 58 ca 72 7f vrcp28ps zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\} 50 [ ]*[a-f0-9]+: 62 f2 7d 58 ca b2 00 02 00 00 vrcp28ps zmm6,DWORD PTR \[edx\+0x200\]\{1to16\} 51 [ ]*[a-f0-9]+: 62 f2 7d 58 ca 72 80 vrcp28ps zmm6,DWORD PTR \[edx-0x200\]\{1to16\} 52 [ ]*[a-f0-9]+: 62 f2 7d 58 ca b2 fc fd ff ff vrcp28ps zmm6,DWORD PTR \[edx-0x204\]\{1to16\}     [all...]

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