/external/skia/src/opts/ |
SkBlitMask_opts_arm_neon.cpp | 32 uint8x8x4_t vdst; local 37 vdst = vld4_u8((uint8_t*)dst); 55 vdst.val[NEON_A] = vbsl_u8(vsel_trans, vdst.val[NEON_A], vdup_n_u8(0xFF)); 56 vdst.val[NEON_A] = vbsl_u8(vsel_opq, vopqDstA, vdst.val[NEON_A]); 58 vdst.val[NEON_R] = SkBlend32_neon8(vcolR, vdst.val[NEON_R], vmaskR); 59 vdst.val[NEON_G] = SkBlend32_neon8(vcolG, vdst.val[NEON_G], vmaskG) 100 uint8x8x4_t vdst; local 174 uint16x8x2_t vdst = vzipq_u16((vdev & vmaskq_ng16), (vdev & vmaskq_g16)); local [all...] |
SkBlitRow_opts_arm_neon.cpp | 36 uint8x8_t vsrc, vdst, vres; local 48 vdst = vreinterpret_u8_u32(vld1_u32(dst)); 55 vdst_wide = vmull_u8(vdst, vdup_n_u8(dst_scale)); 70 uint8x8_t vsrc = vdup_n_u8(0), vdst = vdup_n_u8(0), vres; local 75 vdst = vreinterpret_u8_u32(vld1_lane_u32(dst, vreinterpret_u32_u8(vdst), 0)); 80 vdst_wide = vmull_u8(vdst, vdup_n_u8(dst_scale)); 104 uint8x8_t vsrc = vdup_n_u8(0), vdst = vdup_n_u8(0), vres; local 110 vdst = vreinterpret_u8_u32(vld1_lane_u32(dst, vreinterpret_u32_u8(vdst), 0)) 141 uint8x8_t vsrc, vdst, vres, vsrc_alphas; local [all...] |
/art/runtime/verifier/ |
register_line-inl.h | 39 inline bool RegisterLine::SetRegisterType(MethodVerifier* verifier, uint32_t vdst, 41 DCHECK_LT(vdst, num_regs_); 49 line_[vdst] = new_type.GetId(); 54 ClearAllRegToLockDepths(vdst); 64 inline bool RegisterLine::SetRegisterTypeWide(MethodVerifier* verifier, uint32_t vdst, 67 DCHECK_LT(vdst + 1, num_regs_); 73 line_[vdst] = new_type1.GetId(); 74 line_[vdst + 1] = new_type2.GetId(); 77 ClearAllRegToLockDepths(vdst); 78 ClearAllRegToLockDepths(vdst + 1) [all...] |
register_line.h | 68 // Implement category-1 "move" instructions. Copy a 32-bit value from "vsrc" to "vdst". 69 void CopyRegister1(MethodVerifier* verifier, uint32_t vdst, uint32_t vsrc, TypeCategory cat) 72 // Implement category-2 "move" instructions. Copy a 64-bit value from "vsrc" to "vdst". This 74 void CopyRegister2(MethodVerifier* verifier, uint32_t vdst, uint32_t vsrc) 79 void CopyResultRegister1(MethodVerifier* verifier, uint32_t vdst, bool is_reference) 84 void CopyResultRegister2(MethodVerifier* verifier, uint32_t vdst) 103 uint32_t vdst, 108 uint32_t vdst,
|
register_line.cc | 165 void RegisterLine::CopyResultRegister1(MethodVerifier* verifier, uint32_t vdst, bool is_reference) { 170 << "copyRes1 v" << vdst << "<- result0" << " type=" << type; 173 SetRegisterType<LockOp::kClear>(verifier, vdst, type); 182 void RegisterLine::CopyResultRegister2(MethodVerifier* verifier, uint32_t vdst) { 187 << "copyRes2 v" << vdst << "<- result0" << " type=" << type_l; 190 SetRegisterTypeWide(verifier, vdst, type_l, type_h); // also sets the high
|
/external/mesa3d/src/gallium/auxiliary/util/ |
u_pwr8.h | 54 __m128i_union vdst; local 57 vdst.i[0] = i0; 58 vdst.i[1] = i1; 59 vdst.i[2] = i2; 60 vdst.i[3] = i3; 62 vdst.i[3] = i0; 63 vdst.i[2] = i1; 64 vdst.i[1] = i2; 65 vdst.i[0] = i3; 68 return (__m128i) vdst.m128si [all...] |
/external/libnl/lib/route/link/ |
macvlan.c | 122 struct macvlan_info *vdst, *vsrc = src->l_info; local 128 vdst = dst->l_info; 130 if (!vdst || !vsrc) 133 memcpy(vdst, vsrc, sizeof(struct macvlan_info));
|
vlan.c | 246 struct vlan_info *vdst, *vsrc = src->l_info; local 252 vdst = dst->l_info; 254 vdst->vi_egress_qos = calloc(vsrc->vi_egress_size, 256 if (!vdst->vi_egress_qos) 259 memcpy(vdst->vi_egress_qos, vsrc->vi_egress_qos,
|
vxlan.c | 325 struct vxlan_info *vdst, *vsrc = src->l_info; local 331 vdst = dst->l_info; 333 if (!vdst || !vsrc) 336 memcpy(vdst, vsrc, sizeof(struct vxlan_info));
|
/external/mesa3d/src/mesa/tnl/ |
t_vertex_generic.c | 1020 GLubyte *vdst = vtx->vertex_buf + edst * vtx->vertex_size; local 1037 a[0].insert[4-1]( &a[0], vdst, pos ); 1041 a[0].insert[4-1]( &a[0], vdst, VB->ClipPtr->data[edst] ); 1053 a[j].insert[4-1]( &a[j], vdst + a[j].vertoffset, fdst ); 1065 GLubyte *vdst = vtx->vertex_buf + edst * vtx->vertex_size; local 1074 memcpy( vdst + a[j].vertoffset,
|
/external/llvm/lib/Target/AMDGPU/ |
SILoadStoreOptimizer.cpp | 202 const MachineOperand *Dest0 = TII->getNamedOperand(*I, AMDGPU::OpName::vdst); 203 const MachineOperand *Dest1 = TII->getNamedOperand(*Paired, AMDGPU::OpName::vdst);
|
SIShrinkInstructions.cpp | 367 // Add the dst operand if the 32-bit encoding also has an explicit $vdst. 369 int Op32DstIdx = AMDGPU::getNamedOperandIdx(Op32, AMDGPU::OpName::vdst);
|
SIInstrInfo.cpp | 306 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdst); 307 SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdst); [all...] |
/external/webp/src/enc/ |
iterator_enc.c | 191 uint8_t* const vdst = pic->v + (y * pic->uv_stride + x) * 8; local 205 ExportBlock(vsrc, vdst, pic->uv_stride, uv_w, uv_h);
|
/external/webp/src/dec/ |
frame_dec.c | 414 uint8_t* const vdst = dec->cache_v_ - uvsize + uv_offset; local 438 io->v = vdst; 490 memcpy(dec->cache_v_ - uvsize, vdst + 8 * dec->cache_uv_stride_, uvsize);
|
/external/valgrind/VEX/priv/ |
host_ppc_isel.c | 2348 HReg vdst = newVRegV(env); \/* V128 *\/ local [all...] |