| /external/valgrind/coregrind/m_sigframe/ |
| sigframe-mips32-linux.c | 86 sc->sc_regs[1] = tst->arch.vex.guest_r1;
87 sc->sc_regs[2] = tst->arch.vex.guest_r2;
88 sc->sc_regs[3] = tst->arch.vex.guest_r3;
89 sc->sc_regs[4] = tst->arch.vex.guest_r4;
90 sc->sc_regs[5] = tst->arch.vex.guest_r5;
91 sc->sc_regs[6] = tst->arch.vex.guest_r6;
92 sc->sc_regs[7] = tst->arch.vex.guest_r7;
93 sc->sc_regs[8] = tst->arch.vex.guest_r8;
94 sc->sc_regs[9] = tst->arch.vex.guest_r9;
95 sc->sc_regs[10] = tst->arch.vex.guest_r10
[all...] |
| sigframe-mips64-linux.c | 81 sc->sc_regs[1] = tst->arch.vex.guest_r1;
82 sc->sc_regs[2] = tst->arch.vex.guest_r2;
83 sc->sc_regs[3] = tst->arch.vex.guest_r3;
84 sc->sc_regs[4] = tst->arch.vex.guest_r4;
85 sc->sc_regs[5] = tst->arch.vex.guest_r5;
86 sc->sc_regs[6] = tst->arch.vex.guest_r6;
87 sc->sc_regs[7] = tst->arch.vex.guest_r7;
88 sc->sc_regs[8] = tst->arch.vex.guest_r8;
89 sc->sc_regs[9] = tst->arch.vex.guest_r9;
90 sc->sc_regs[10] = tst->arch.vex.guest_r10
[all...] |
| sigframe-s390x-linux.c | 65 do { zztst->arch.vex.guest_r##zzn = (unsigned long)(zzval); \
106 VexGuestS390XState vex; member in struct:vg_sigframe
147 sigregs->regs.gprs[0] = tst->arch.vex.guest_r0;
148 sigregs->regs.gprs[1] = tst->arch.vex.guest_r1;
149 sigregs->regs.gprs[2] = tst->arch.vex.guest_r2;
150 sigregs->regs.gprs[3] = tst->arch.vex.guest_r3;
151 sigregs->regs.gprs[4] = tst->arch.vex.guest_r4;
152 sigregs->regs.gprs[5] = tst->arch.vex.guest_r5;
153 sigregs->regs.gprs[6] = tst->arch.vex.guest_r6;
154 sigregs->regs.gprs[7] = tst->arch.vex.guest_r7
[all...] |
| sigframe-amd64-linux.c | 103 VexGuestAMD64State vex; member in struct:vg_sigframe
323 Vex guest state. NOTE: does not fill in the FP or SSE
344 # define SC2(reg,REG) sc->reg = tst->arch.vex.guest_##REG
363 sc->eflags = LibVEX_GuestAMD64_get_rflags(&tst->arch.vex);
388 frame->vex = tst->arch.vex;
439 = (void*)tst->arch.vex.guest_RIP;
477 tst->arch.vex.guest_RIP = (Addr) handler;
478 tst->arch.vex.guest_RDI = (ULong) siginfo->si_signo;
479 tst->arch.vex.guest_RSI = (Addr) &frame->sigInfo
[all...] |
| sigframe-arm64-linux.c | 50 /* This uses the hack of dumping the vex guest state along with both
64 VexGuestARM64State vex; member in struct:vg_sig_private
96 # define SC2(reg) sc->regs[reg] = tst->arch.vex.guest_X##reg
106 sc->sp = tst->arch.vex.guest_XSP;
107 sc->pc = tst->arch.vex.guest_PC;
147 priv->vex = tst->arch.vex;
190 = (Addr*)(tst)->arch.vex.guest_PC;
197 tst->arch.vex.guest_X1 = (Addr)&rsf->info;
198 tst->arch.vex.guest_X2 = (Addr)&rsf->sig.uc
[all...] |
| sigframe-ppc64-linux.c | 120 do { tst->arch.vex.guest_LR = (zzval); \
127 do { tst->arch.vex.guest_GPR##zzn = (zzval); \
182 *(Addr *)sp = tst->arch.vex.guest_GPR1;
189 faultaddr = tst->arch.vex.guest_CIA;
204 = tst->arch.vex.guest_GPR##gpr
211 frame->uc.uc_mcontext.gp_regs[VKI_PT_NIP] = tst->arch.vex.guest_CIA;
217 frame->uc.uc_mcontext.gp_regs[VKI_PT_ORIG_R3] = tst->arch.vex.guest_GPR3;
218 frame->uc.uc_mcontext.gp_regs[VKI_PT_CTR] = tst->arch.vex.guest_CTR;
219 frame->uc.uc_mcontext.gp_regs[VKI_PT_LNK] = tst->arch.vex.guest_LR;
221 &tst->arch.vex);
[all...] |
| sigframe-x86-linux.c | 108 VexGuestX86State vex; member in struct:vg_sigframe
346 Vex guest state. NOTE: does not fill in the FP or SSE
367 # define SC2(reg,REG) sc->reg = tst->arch.vex.guest_##REG
384 sc->eflags = LibVEX_GuestX86_get_eflags(&tst->arch.vex);
407 frame->vex = tst->arch.vex;
522 = (void*)tst->arch.vex.guest_EIP;
563 tst->arch.vex.guest_EIP = (Addr) handler;
570 esp, tst->arch.vex.guest_EIP, (Int)tst->status);
599 tst->arch.vex = frame->vex
[all...] |
| sigframe-amd64-darwin.c | 65 VexGuestAMD64State vex; member in struct:hacky_sigframe
79 Vex guest state. NOTE: does not fill in the FP or SSE
92 # define SC2(reg,REG) uc->__mcontext_data.__ss.reg = tst->arch.vex.guest_##REG
110 uc->__mcontext_data.__ss.__rflags = LibVEX_GuestAMD64_get_rflags(&tst->arch.vex);
120 # define SC2(REG,reg) tst->arch.vex.guest_##REG = uc->__mcontext_data.__ss.reg
179 VG_(memset)(&frame->vex, 0, sizeof(VexGuestAMD64State));
186 frame->vex = tst->arch.vex;
212 tst->arch.vex.guest_RDI = (ULong) sigNo;
213 tst->arch.vex.guest_RSI = (Addr) &frame->fake_siginfo
[all...] |
| sigframe-ppc32-linux.c | 122 do { tst->arch.vex.guest_LR = (zzval); \
129 do { tst->arch.vex.guest_GPR##zzn = (zzval); \
145 # define DO(gpr) mc->mc_gregs[VKI_PT_R0+gpr] = tst->arch.vex.guest_GPR##gpr
152 mc->mc_gregs[VKI_PT_NIP] = tst->arch.vex.guest_CIA;
154 mc->mc_gregs[VKI_PT_ORIG_R3] = tst->arch.vex.guest_GPR3;
155 mc->mc_gregs[VKI_PT_CTR] = tst->arch.vex.guest_CTR;
156 mc->mc_gregs[VKI_PT_LNK] = tst->arch.vex.guest_LR;
157 mc->mc_gregs[VKI_PT_XER] = LibVEX_GuestPPC32_get_XER(&tst->arch.vex);
158 mc->mc_gregs[VKI_PT_CCR] = LibVEX_GuestPPC32_get_CR(&tst->arch.vex);
212 //:: VexGuestPPC32State vex;
[all...] |
| sigframe-arm-linux.c | 55 /* This uses the hack of dumping the vex guest state along with both
67 VexGuestARMState vex; member in struct:vg_sig_private
98 # define SC2(reg,REG) sc->arm_##reg = tst->arch.vex.guest_##REG
154 priv->vex = tst->arch.vex;
203 rsf->info._sifields._sigfault._addr = (Addr *) (tst)->arch.vex.guest_R12; /* IP */
210 tst->arch.vex.guest_R1 = (Addr)&rsf->info;
211 tst->arch.vex.guest_R2 = (Addr)&rsf->sig.uc;
221 tst->arch.vex.guest_R0 = sigNo;
224 tst->arch.vex.guest_R14 = (Addr)restorer;
[all...] |
| sigframe-x86-darwin.c | 68 VexGuestX86State vex; member in struct:hacky_sigframe
83 Vex guest state. NOTE: does not fill in the FP or SSE
96 # define SC2(reg,REG) uc->__mcontext_data.__ss.reg = tst->arch.vex.guest_##REG
106 uc->__mcontext_data.__ss.__eflags = LibVEX_GuestX86_get_eflags(&tst->arch.vex);
116 # define SC2(REG,reg) tst->arch.vex.guest_##REG = uc->__mcontext_data.__ss.reg
167 VG_(memset)(&frame->vex, 0, sizeof(VexGuestX86State));
174 frame->vex = tst->arch.vex;
244 tst->arch.vex = frame->vex;
[all...] |
| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-amd64-darwin.c | 67 VexGuestAMD64State *vex)
69 mach->__rax = vex->guest_RAX;
70 mach->__rbx = vex->guest_RBX;
71 mach->__rcx = vex->guest_RCX;
72 mach->__rdx = vex->guest_RDX;
73 mach->__rdi = vex->guest_RDI;
74 mach->__rsi = vex->guest_RSI;
75 mach->__rbp = vex->guest_RBP;
76 mach->__rsp = vex->guest_RSP;
77 mach->__rflags = LibVEX_GuestAMD64_get_rflags(vex);
124 VexGuestAMD64State *vex = (VexGuestAMD64State *)vex_generic; local
218 VexGuestAMD64State *vex = (VexGuestAMD64State *)vex_generic; local
341 VexGuestAMD64State *vex = &tst->arch.vex; local
436 VexGuestAMD64State *vex; local
[all...] |
| syswrap-x86-darwin.c | 65 VexGuestX86State *vex)
67 mach->__eax = vex->guest_EAX;
68 mach->__ebx = vex->guest_EBX;
69 mach->__ecx = vex->guest_ECX;
70 mach->__edx = vex->guest_EDX;
71 mach->__edi = vex->guest_EDI;
72 mach->__esi = vex->guest_ESI;
73 mach->__ebp = vex->guest_EBP;
74 mach->__esp = vex->guest_ESP;
75 mach->__ss = vex->guest_SS
100 VexGuestX86State *vex = (VexGuestX86State *)vex_generic; local
155 VexGuestX86State *vex = (VexGuestX86State *)vex_generic; local
281 VexGuestX86State *vex = &tst->arch.vex; local
384 VexGuestX86State *vex; local
[all...] |
| syswrap-x86-solaris.c | 144 uc->uc_mcontext.gregs[VKI_EIP] = tst->arch.vex.guest_EIP;
147 uc->uc_mcontext.gregs[VKI_EAX] = tst->arch.vex.guest_EAX;
150 uc->uc_mcontext.gregs[VKI_EBX] = tst->arch.vex.guest_EBX;
153 uc->uc_mcontext.gregs[VKI_ECX] = tst->arch.vex.guest_ECX;
156 uc->uc_mcontext.gregs[VKI_EDX] = tst->arch.vex.guest_EDX;
159 uc->uc_mcontext.gregs[VKI_EBP] = tst->arch.vex.guest_EBP;
162 uc->uc_mcontext.gregs[VKI_ESI] = tst->arch.vex.guest_ESI;
165 uc->uc_mcontext.gregs[VKI_EDI] = tst->arch.vex.guest_EDI;
168 uc->uc_mcontext.gregs[VKI_UESP] = tst->arch.vex.guest_ESP;
184 /* Note that segment registers are 16b in VEX, but 32b in mcontext. Thu
[all...] |
| syswrap-amd64-solaris.c | 120 uc->uc_mcontext.gregs[VKI_REG_RIP] = tst->arch.vex.guest_RIP;
123 uc->uc_mcontext.gregs[VKI_REG_RAX] = tst->arch.vex.guest_RAX;
126 uc->uc_mcontext.gregs[VKI_REG_RBX] = tst->arch.vex.guest_RBX;
129 uc->uc_mcontext.gregs[VKI_REG_RCX] = tst->arch.vex.guest_RCX;
132 uc->uc_mcontext.gregs[VKI_REG_RDX] = tst->arch.vex.guest_RDX;
135 uc->uc_mcontext.gregs[VKI_REG_RBP] = tst->arch.vex.guest_RBP;
138 uc->uc_mcontext.gregs[VKI_REG_RSI] = tst->arch.vex.guest_RSI;
141 uc->uc_mcontext.gregs[VKI_REG_RDI] = tst->arch.vex.guest_RDI;
144 uc->uc_mcontext.gregs[VKI_REG_R8] = tst->arch.vex.guest_R8;
147 uc->uc_mcontext.gregs[VKI_REG_R9] = tst->arch.vex.guest_R9
[all...] |
| syswrap-main.c | 340 syscallno, &tst->arch.vex,
347 VG_DARWIN_SYSNO_FOR_KERNEL(syscallno), &tst->arch.vex,
353 VG_DARWIN_SYSNO_FOR_KERNEL(syscallno), &tst->arch.vex,
359 VG_DARWIN_SYSNO_FOR_KERNEL(syscallno), &tst->arch.vex,
379 syscallno, &tst->arch.vex,
384 syscallno, &tst->arch.vex,
390 LibVEX_GuestX86_put_eflag_c(cflag, &tst->arch.vex);
392 LibVEX_GuestAMD64_put_rflag_c(cflag, &tst->arch.vex);
[all...] |
| priv_syswrap-solaris.h | 61 extern void ML_(setup_gdt)(VexGuestX86State *vex);
62 extern void ML_(cleanup_gdt)(VexGuestX86State *vex);
|
| syswrap-x86-linux.c | 367 static void deallocate_LGDTs_for_thread ( VexGuestX86State* vex )
374 vex->guest_LDT, vex->guest_GDT );
376 if (vex->guest_LDT != (HWord)NULL) {
377 free_LDT_or_GDT( (VexGuestX86SegDescr*)(HWord)vex->guest_LDT );
378 vex->guest_LDT = (HWord)NULL;
381 if (vex->guest_GDT != (HWord)NULL) {
382 free_LDT_or_GDT( (VexGuestX86SegDescr*)(HWord)vex->guest_GDT );
383 vex->guest_GDT = (HWord)NULL;
415 ldt = (UChar*)(HWord)(VG_(threads)[tid].arch.vex.guest_LDT)
[all...] |
| /external/valgrind/coregrind/ |
| m_machine.c | 45 #define INSTR_PTR(regs) ((regs).vex.VG_INSTR_PTR)
46 #define STACK_PTR(regs) ((regs).vex.VG_STACK_PTR)
47 #define FRAME_PTR(regs) ((regs).vex.VG_FRAME_PTR)
70 regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_EIP;
71 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_ESP;
73 = VG_(threads)[tid].arch.vex.guest_EBP;
75 regs->r_pc = VG_(threads)[tid].arch.vex.guest_RIP;
76 regs->r_sp = VG_(threads)[tid].arch.vex.guest_RSP;
78 = VG_(threads)[tid].arch.vex.guest_RBP;
80 regs->r_pc = (ULong)VG_(threads)[tid].arch.vex.guest_CIA
187 VexGuestArchState* vex = &(VG_(get_ThreadState)(tid)->arch.vex); local
[all...] |
| /external/valgrind/coregrind/m_coredump/ |
| coredump-elf.c | 262 regs->eflags = LibVEX_GuestX86_get_eflags( &arch->vex );
263 regs->esp = arch->vex.guest_ESP;
264 regs->eip = arch->vex.guest_EIP;
266 regs->ebx = arch->vex.guest_EBX;
267 regs->ecx = arch->vex.guest_ECX;
268 regs->edx = arch->vex.guest_EDX;
269 regs->esi = arch->vex.guest_ESI;
270 regs->edi = arch->vex.guest_EDI;
271 regs->ebp = arch->vex.guest_EBP;
272 regs->eax = arch->vex.guest_EAX
[all...] |
| coredump-solaris.c | 91 if (YMM_NON_ZERO(arch->vex.guest_YMM0) ||
92 YMM_NON_ZERO(arch->vex.guest_YMM1) ||
93 YMM_NON_ZERO(arch->vex.guest_YMM2) ||
94 YMM_NON_ZERO(arch->vex.guest_YMM3) ||
95 YMM_NON_ZERO(arch->vex.guest_YMM4) ||
96 YMM_NON_ZERO(arch->vex.guest_YMM5) ||
97 YMM_NON_ZERO(arch->vex.guest_YMM6) ||
98 YMM_NON_ZERO(arch->vex.guest_YMM7) ||
99 YMM_NON_ZERO(arch->vex.guest_YMM9) ||
100 YMM_NON_ZERO(arch->vex.guest_YMM0) |
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 48 #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
49 #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
50 #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
51 #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
52 #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 52 #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
53 #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
54 #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
55 #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
56 #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7
[all...] |
| /external/valgrind/coregrind/m_initimg/ |
| initimg-linux.c | 390 * checked against the Vex settings of the host platform as given
740 * matches the setting in VEX HWCAPS.
[all...] |
| initimg-solaris.c | 752 /* The CPUID simulation provided by VEX claims to have POPCNT, AES
763 /* The CPUID simulation provided by VEX claims to have PCLMULQDQ and
784 TODO VEX supports AVX, BMI and AVX2. Investigate if they can be
[all...] |
