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Searched
refs:virtReg
(Results
1 - 14
of
14
) sorted by null
/external/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
LiveIntervalUnion.h
87
void unify(LiveInterval &
VirtReg
, const LiveRange &Range);
88
void unify(LiveInterval &
VirtReg
) {
89
unify(
VirtReg
,
VirtReg
);
93
void extract(LiveInterval &
VirtReg
, const LiveRange &Range);
94
void extract(LiveInterval &
VirtReg
) {
95
extract(
VirtReg
,
VirtReg
);
113
LiveInterval *
VirtReg
;
114
LiveInterval::iterator VirtRegI; // current position in
VirtReg
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/
VirtRegMap.h
92
bool hasPhys(unsigned
virtReg
) const {
93
return getPhys(
virtReg
) != NO_PHYS_REG;
98
unsigned getPhys(unsigned
virtReg
) const {
99
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
100
return Virt2PhysMap[
virtReg
];
105
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
106
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
108
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
111
Virt2PhysMap[
virtReg
] = physReg;
116
void clearVirt(unsigned
virtReg
) {
[
all
...]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
VirtRegMap.h
171
bool hasPhys(unsigned
virtReg
) const {
172
return getPhys(
virtReg
) != NO_PHYS_REG;
177
unsigned getPhys(unsigned
virtReg
) const {
178
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
179
return Virt2PhysMap[
virtReg
];
184
void assignVirt2Phys(unsigned
virtReg
, unsigned physReg) {
185
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
) &&
187
assert(Virt2PhysMap[
virtReg
] == NO_PHYS_REG &&
190
Virt2PhysMap[
virtReg
] = physReg;
195
void clearVirt(unsigned
virtReg
) {
[
all
...]
VirtRegMap.cpp
118
unsigned VirtRegMap::getRegAllocPref(unsigned
virtReg
) {
119
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(
virtReg
);
129
int VirtRegMap::assignVirt2StackSlot(unsigned
virtReg
) {
130
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
131
assert(Virt2StackSlotMap[
virtReg
] == NO_STACK_SLOT &&
133
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(
virtReg
);
134
return Virt2StackSlotMap[
virtReg
] = createSpillSlot(RC);
137
void VirtRegMap::assignVirt2StackSlot(unsigned
virtReg
, int SS) {
138
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
139
assert(Virt2StackSlotMap[
virtReg
] == NO_STACK_SLOT &
[
all
...]
LiveIntervalUnion.h
92
void unify(LiveInterval &
VirtReg
);
95
void extract(LiveInterval &
VirtReg
);
112
LiveInterval *
VirtReg
;
113
LiveInterval::iterator VirtRegI; // current position in
VirtReg
122
Query(): LiveUnion(),
VirtReg
(), Tag(0), UserTag(0) {}
125
LiveUnion(LIU),
VirtReg
(VReg), CheckedFirstInterference(false),
131
VirtReg
= NULL;
142
if (UserTag == UTag &&
VirtReg
== VReg &&
149
VirtReg
= VReg;
154
LiveInterval &
virtReg
() const
[
all
...]
/external/llvm/lib/CodeGen/
VirtRegMap.cpp
82
bool VirtRegMap::hasPreferredPhys(unsigned
VirtReg
) {
83
unsigned Hint = MRI->getSimpleHint(
VirtReg
);
88
return getPhys(
VirtReg
) == Hint;
91
bool VirtRegMap::hasKnownPreference(unsigned
VirtReg
) {
92
std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(
VirtReg
);
100
int VirtRegMap::assignVirt2StackSlot(unsigned
virtReg
) {
101
assert(TargetRegisterInfo::isVirtualRegister(
virtReg
));
102
assert(Virt2StackSlotMap[
virtReg
] == NO_STACK_SLOT &&
104
const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(
virtReg
);
105
return Virt2StackSlotMap[
virtReg
] = createSpillSlot(RC)
[
all
...]
Completed in 1987 milliseconds