| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| vldr.s | 4 vldr d0, float
5 vldr d0, float
|
| thumb2_vpool.s | 9 vldr \regtype\regindex, \const
12 # Thumb-2 support vldr literal pool also.
51 vldr d1, =0x0000fff000000000
57 vldr d1, =0x0000fff000000000
61 vldr d1, =0x0000fff000000000
62 vldr s2, =0xff000000
64 vldr d3, =0x0000fff000000001
66 vldr s4, =0xff000001
68 vldr d5, =0x0000fff000000001
70 vldr d6, =0x0000fff00000000
[all...] |
| vldconst.s | 1 @ Test file for ARM/GAS -- vldr reg, =... expressions.
10 vldr \regtype\regindex, \const
100 vldr d1, =0x0000fff000000000
106 vldr d1, =0x0000fff000000000
110 vldr d1, =0x0000fff000000000
111 vldr s2, =0xff000000
113 vldr d3, =0x0000fff000000001
115 vldr s4, =0xff000001
117 vldr d5, =0x0000fff000000001
119 vldr d6, =0x0000fff00000000
[all...] |
| vldr.d | 1 # name: VFP VLDR
3 # source: vldr.s
11 0[0-9a-f]+ <[^>]+> ed9f 0b03 vldr d0, \[pc, #12\] ; 00000010 <float>
12 0[0-9a-f]+ <[^>]+> ed9f 0b02 vldr d0, \[pc, #8\] ; 00000010 <float>
|
| thumb2_vpool.d | 5 #name: Thumb2 vldr with immediate constant
10 00000000 <thumb2_ldr> ed9f 0a0f vldr s0, \[pc, #60\] ; 00000040 <thumb2_ldr\+0x40>
11 00000004 <thumb2_ldr\+0x4> ed9f 7a0e vldr s14, \[pc, #56\] ; 00000040 <thumb2_ldr\+0x40>
12 00000008 <thumb2_ldr\+0x8> ed9f ea0d vldr s28, \[pc, #52\] ; 00000040 <thumb2_ldr\+0x40>
13 0000000c <thumb2_ldr\+0xc> eddf fa0c vldr s31, \[pc, #48\] ; 00000040 <thumb2_ldr\+0x40>
14 00000010 <thumb2_ldr\+0x10> ed9f 0a0c vldr s0, \[pc, #48\] ; 00000044 <thumb2_ldr\+0x44>
15 00000014 <thumb2_ldr\+0x14> ed9f 7a0b vldr s14, \[pc, #44\] ; 00000044 <thumb2_ldr\+0x44>
16 00000018 <thumb2_ldr\+0x18> ed9f ea0a vldr s28, \[pc, #40\] ; 00000044 <thumb2_ldr\+0x44>
17 0000001c <thumb2_ldr\+0x1c> eddf fa09 vldr s31, \[pc, #36\] ; 00000044 <thumb2_ldr\+0x44>
18 00000020 <thumb2_ldr\+0x20> ed9f 0a09 vldr s0, \[pc, #36\] ; 00000048 <thumb2_ldr\+0x48
[all...] |
| thumb2_vpool_be.d | 5 #name: Thumb2 vldr with immediate constant
11 00000000 <thumb2_ldr> ed9f 0a0f vldr s0, \[pc, #60\] ; 00000040 <thumb2_ldr\+0x40>
12 00000004 <thumb2_ldr\+0x4> ed9f 7a0e vldr s14, \[pc, #56\] ; 00000040 <thumb2_ldr\+0x40>
13 00000008 <thumb2_ldr\+0x8> ed9f ea0d vldr s28, \[pc, #52\] ; 00000040 <thumb2_ldr\+0x40>
14 0000000c <thumb2_ldr\+0xc> eddf fa0c vldr s31, \[pc, #48\] ; 00000040 <thumb2_ldr\+0x40>
15 00000010 <thumb2_ldr\+0x10> ed9f 0a0c vldr s0, \[pc, #48\] ; 00000044 <thumb2_ldr\+0x44>
16 00000014 <thumb2_ldr\+0x14> ed9f 7a0b vldr s14, \[pc, #44\] ; 00000044 <thumb2_ldr\+0x44>
17 00000018 <thumb2_ldr\+0x18> ed9f ea0a vldr s28, \[pc, #40\] ; 00000044 <thumb2_ldr\+0x44>
18 0000001c <thumb2_ldr\+0x1c> eddf fa09 vldr s31, \[pc, #36\] ; 00000044 <thumb2_ldr\+0x44>
19 00000020 <thumb2_ldr\+0x20> ed9f 0a09 vldr s0, \[pc, #36\] ; 00000048 <thumb2_ldr\+0x48
[all...] |
| ldr-global.s | 10 vldr s0, bar
15 vldr s0, bar
|
| ldr-global.d | 9 0+08 <[^>]*> ed9f0a02 ? vldr s0, \[pc, #8\] ; 0+18 <[^>]*>
12 0+10 <[^>]*> ed9f 0a01 ? vldr s0, \[pc, #4\] ; 0+18 <[^>]*>
|
| neon-ldst-rm.s | 34 vldr d22, forward
36 single vldr 4
38 single vldr 256
44 vldr d7, backward
|
| vldconst.d | 2 #name: ARM vldr with immediate constant
9 00000000 <foo> ed9f0a0e vldr s0, \[pc, #56\] ; 00000040 <foo\+0x40>
10 00000004 <foo\+0x4> ed9f7a0d vldr s14, \[pc, #52\] ; 00000040 <foo\+0x40>
11 00000008 <foo\+0x8> ed9fea0c vldr s28, \[pc, #48\] ; 00000040 <foo\+0x40>
12 0000000c <foo\+0xc> eddffa0b vldr s31, \[pc, #44\] ; 00000040 <foo\+0x40>
13 00000010 <foo\+0x10> ed9f0a0b vldr s0, \[pc, #44\] ; 00000044 <foo\+0x44>
14 00000014 <foo\+0x14> ed9f7a0a vldr s14, \[pc, #40\] ; 00000044 <foo\+0x44>
15 00000018 <foo\+0x18> ed9fea09 vldr s28, \[pc, #36\] ; 00000044 <foo\+0x44>
16 0000001c <foo\+0x1c> eddffa08 vldr s31, \[pc, #32\] ; 00000044 <foo\+0x44>
17 00000020 <foo\+0x20> ed9f0a08 vldr s0, \[pc, #32\] ; 00000048 <foo\+0x48
[all...] |
| vldconst_be.d | 2 #name: ARM vldr with immediate constant (Big Endian)
10 00000000 <foo> ed9f0a0e vldr s0, \[pc, #56\] ; 00000040 <foo\+0x40>
11 00000004 <foo\+0x4> ed9f7a0d vldr s14, \[pc, #52\] ; 00000040 <foo\+0x40>
12 00000008 <foo\+0x8> ed9fea0c vldr s28, \[pc, #48\] ; 00000040 <foo\+0x40>
13 0000000c <foo\+0xc> eddffa0b vldr s31, \[pc, #44\] ; 00000040 <foo\+0x40>
14 00000010 <foo\+0x10> ed9f0a0b vldr s0, \[pc, #44\] ; 00000044 <foo\+0x44>
15 00000014 <foo\+0x14> ed9f7a0a vldr s14, \[pc, #40\] ; 00000044 <foo\+0x44>
16 00000018 <foo\+0x18> ed9fea09 vldr s28, \[pc, #36\] ; 00000044 <foo\+0x44>
17 0000001c <foo\+0x1c> eddffa08 vldr s31, \[pc, #32\] ; 00000044 <foo\+0x44>
18 00000020 <foo\+0x20> ed9f0a08 vldr s0, \[pc, #32\] ; 00000048 <foo\+0x48
[all...] |
| neon-ldst-rm.d | 49 0[0-9a-f]+ <[^>]+> eddf6b0b vldr d22, \[pc, #44\] ; 0[0-9a-f]+ <forward>
50 0[0-9a-f]+ <[^>]+> ed935b00 vldr d5, \[r3\]
51 0[0-9a-f]+ <[^>]+> ed135b01 vldr d5, \[r3, #-4\]
52 0[0-9a-f]+ <[^>]+> ed935b01 vldr d5, \[r3, #4\]
56 0[0-9a-f]+ <[^>]+> ed935b00 vldr d5, \[r3\]
57 0[0-9a-f]+ <[^>]+> ed135b40 vldr d5, \[r3, #-256\].*
58 0[0-9a-f]+ <[^>]+> ed935b40 vldr d5, \[r3, #256\].*
63 0[0-9a-f]+ <[^>]+> ed1f7b11 vldr d7, \[pc, #-68\] ; 0[0-9a-f]+ <backward>
|
| group-reloc-ldc.d | 392 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
394 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
396 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
398 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
400 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
402 0[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\].*
416 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].*
418 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].*
420 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].*
422 0[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\].
[all...] |
| vfp-neon-overlap.d | 16 0[0-9a-f]+ <[^>]+> ed900b00 vldr d0, \[r0\]
17 0[0-9a-f]+ <[^>]+> ed900b00 vldr d0, \[r0\]
|
| vfp1.d | 27 0+044 <[^>]*> ed900b00 vldr d0, \[r0\]
112 0+198 <[^>]*> ed910b00 vldr d0, \[r1\]
113 0+19c <[^>]*> ed9e0b00 vldr d0, \[lr\]
114 0+1a0 <[^>]*> ed900b00 vldr d0, \[r0\]
115 0+1a4 <[^>]*> ed900bff vldr d0, \[r0, #1020\].*
116 0+1a8 <[^>]*> ed100bff vldr d0, \[r0, #-1020\].*
117 0+1ac <[^>]*> ed901b00 vldr d1, \[r0\]
118 0+1b0 <[^>]*> ed902b00 vldr d2, \[r0\]
119 0+1b4 <[^>]*> ed90fb00 vldr d15, \[r0\]
|
| /external/llvm/test/MC/ARM/ |
| directive-fpu-instrs.s | 5 vldr d21, [r7, #296] label
13 vldr d21, [r7, #296] label
|
| simple-fp-encoding.s | 228 @ CHECK: vldr d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed]
229 @ CHECK: vldr s0, [lr] @ encoding: [0x00,0x0a,0x9e,0xed]
230 @ CHECK: vldr d0, [lr] @ encoding: [0x00,0x0b,0x9e,0xed]
232 vldr.64 d17, [r0]
233 vldr.i32 s0, [lr]
234 vldr.d d0, [lr]
236 @ CHECK: vldr d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed]
237 @ CHECK: vldr d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed]
238 vldr.64 d1, [r2, #32]
239 vldr.f64 d1, [r2, #-32
[all...] |
| big-endian-arm-fixup.s | 47 vldr d0, arm_pcrel_10_label+16
|
| fullfp16.s | 221 vldr.16 s1, [pc, #6]
222 vldr.16 s2, [pc, #510]
223 vldr.16 s3, [pc, #-510]
224 vldr.16 s4, [r4, #-18]
225 @ ARM: vldr.16 s1, [pc, #6] @ encoding: [0x03,0x09,0xdf,0xed]
226 @ ARM: vldr.16 s2, [pc, #510] @ encoding: [0xff,0x19,0x9f,0xed]
227 @ ARM: vldr.16 s3, [pc, #-510] @ encoding: [0xff,0x19,0x5f,0xed]
228 @ ARM: vldr.16 s4, [r4, #-18] @ encoding: [0x09,0x29,0x14,0xed]
229 @ THUMB: vldr.16 s1, [pc, #6] @ encoding: [0xdf,0xed,0x03,0x09]
230 @ THUMB: vldr.16 s2, [pc, #510] @ encoding: [0x9f,0xed,0xff,0x19
[all...] |
| fullfp16-neg.s | 164 vldr.16 s1, [pc, #6]
165 vldr.16 s2, [pc, #510]
166 vldr.16 s3, [pc, #-510]
167 vldr.16 s4, [r4, #-18]
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| vfp11-fix-scalar.d | 10 8004: ed927a00 (vldr|flds) s14, \[r2\]
|
| vfp11-fix-vector.d | 11 8008: ed927a00 (vldr|flds) s14, \[r2\]
|
| /art/runtime/interpreter/mterp/arm/ |
| op_long_to_double.S | 13 vldr d0, [r3] @ d0<- vAA
18 vldr d3, constval$opcode
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| simple-fp-encoding.s | 175 @ CHECK: vldr.64 d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed]
176 vldr.64 d17, [r0]
178 @ CHECK: vldr.64 d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed]
179 @ CHECK: vldr.64 d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed]
180 vldr.64 d1, [r2, #32]
181 vldr.64 d1, [r2, #-32]
183 @ CHECK: vldr.64 d2, [r3] @ encoding: [0x00,0x2b,0x93,0xed]
184 vldr.64 d2, [r3]
186 @ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed]
187 @ CHECK: vldr.64 d3, [pc] @ encoding: [0x00,0x3b,0x9f,0xed
[all...] |
| /external/v8/src/crankshaft/arm/ |
| lithium-gap-resolver-arm.cc | 169 __ vldr(kScratchDoubleReg, cgen_->ToMemOperand(source));
225 __ vldr(kScratchDoubleReg.low(), source_operand);
275 __ vldr(cgen_->ToDoubleRegister(destination), source_operand);
282 __ vldr(kScratchDoubleReg, source_operand);
286 __ vldr(kScratchDoubleReg, source_operand);
|
