| /external/llvm/test/MC/ARM/ |
| neon-v8.s | 60 vrintz.f32 d12, d18
61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xa2,0xc5,0xba,0xf3]
62 vrintz.f32 q9, q4
63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3]
80 vrintz.f32.f32 q9, q4
81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xc8,0x25,0xfa,0xf3]
|
| thumb-neon-v8.s | 60 vrintz.f32 d12, d18
61 @ CHECK: vrintz.f32 d12, d18 @ encoding: [0xba,0xff,0xa2,0xc5]
62 vrintz.f32 q9, q4
63 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
80 vrintz.f32.f32 q9, q4
81 @ CHECK: vrintz.f32 q9, q4 @ encoding: [0xfa,0xff,0xc8,0x25]
|
| directive-arch_extension-simd.s | 62 vrintz.f32 s0, s1
64 vrintz.f64 d0, d1
66 vrintz.f32.f32 s0, s0
68 vrintz.f64.f64 d0, d0
170 vrintz.f32 s0, s1
172 vrintz.f64 d0, d1
174 vrintz.f32.f32 s0, s0
176 vrintz.f64.f64 d0, d0
|
| directive-arch_extension-fp.s | 90 vrintz.f32 s0, s1
92 vrintz.f64 d0, d1
94 vrintz.f32.f32 s0, s0
96 vrintz.f64.f64 d0, d0
226 vrintz.f32 s0, s1
228 vrintz.f64 d0, d1
230 vrintz.f32.f32 s0, s0
232 vrintz.f64.f64 d0, d0
|
| invalid-neon-v8.s | 23 vrintz.f32 d3, q12
|
| fp-armv8.s | 96 vrintz.f32 s3, s24
97 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xcc,0x1a,0xf6,0xee]
|
| thumb-fp-armv8.s | 99 vrintz.f32 s3, s24
100 @ CHECK: vrintz.f32 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x1a]
|
| fullfp16.s | 169 vrintz.f16 s3, s24
170 @ ARM: vrintz.f16 s3, s24 @ encoding: [0xcc,0x19,0xf6,0xee]
171 @ THUMB: vrintz.f16 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x19]
|
| fullfp16-neg.s | 125 vrintz.f16 s3, s24
|
| fullfp16-neon-neg.s | 286 vrintz.f16.f16 d0, d1
287 vrintz.f16.f16 q0, q1
|
| fullfp16-neon.s | 399 vrintz.f16.f16 d0, d1
400 vrintz.f16.f16 q0, q1
401 @ ARM: vrintz.f16 d0, d1 @ encoding: [0x81,0x05,0xb6,0xf3]
402 @ ARM: vrintz.f16 q0, q1 @ encoding: [0xc2,0x05,0xb6,0xf3]
403 @ THUMB: vrintz.f16 d0, d1 @ encoding: [0xb6,0xff,0x81,0x05]
404 @ THUMB: vrintz.f16 q0, q1 @ encoding: [0xb6,0xff,0xc2,0x05]
|
| diagnostics.s | 469 vrintz.f32.f32 s0, s1
472 vrintz.f64 d10, d9
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv8-a+simd.s | 35 vrintz.f32 d16, d15
41 vrintz.f32 q8, q7
73 vrintz.f32 d16, d15
79 vrintz.f32 q8, q7
|
| armv8-a+fp.s | 39 vrintz.f32 s0, s0
46 vrintz.f64 d0, d0
95 vrintz.f32 s0, s0
102 vrintz.f64 d0, d0
|
| armv8-a+simd.d | 37 0[0-9a-f]+ <[^>]+> f3fa058f vrintz.f32 d16, d15
43 0[0-9a-f]+ <[^>]+> f3fa05ce vrintz.f32 q8, q7
73 0[0-9a-f]+ <[^>]+> fffa 058f vrintz.f32 d16, d15
79 0[0-9a-f]+ <[^>]+> fffa 05ce vrintz.f32 q8, q7
|
| armv8-a+fp.d | 40 0[0-9a-f]+ <[^>]+> eeb60ac0 vrintz.f32 s0, s0
47 0[0-9a-f]+ <[^>]+> eeb60bc0 vrintz.f64 d0, d0
94 0[0-9a-f]+ <[^>]+> eeb6 0ac0 vrintz.f32 s0, s0
101 0[0-9a-f]+ <[^>]+> eeb6 0bc0 vrintz.f64 d0, d0
|
| /external/valgrind/none/tests/arm/ |
| v8fpsimd_a.stdout.exp | [all...] |
| v8fpsimd_t.stdout.exp | [all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | [all...] |
| assembler-arm.h | [all...] |
| assembler-arm.cc | 3814 void Assembler::vrintz(const SwVfpRegister dst, const SwVfpRegister src, function in class:v8::internal::Assembler
3828 void Assembler::vrintz(const DwVfpRegister dst, const DwVfpRegister src, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/aarch32/ |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.h | 5511 void vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm) { function in class:vixl::aarch32::Assembler
5519 void vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 6332 void Disassembler::vrintz( function in class:vixl::aarch32::Disassembler
6339 void Disassembler::vrintz(DataType dt1, function in class:vixl::aarch32::Disassembler
6347 void Disassembler::vrintz( function in class:vixl::aarch32::Disassembler
[all...] |
| /external/v8/src/compiler/arm/ |
| code-generator-arm.cc | [all...] |
