| /toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/bfin/ |
| unknown-mode.s | 5 .byte 0xe1
|
| /external/vixl/test/aarch32/traces/ |
| assembler-rd-rn-rm-a32-crc32b.h | 38 0x4c, 0x20, 0x0a, 0xe1 // crc32b r2 r10 r12
41 0x4b, 0x20, 0x0b, 0xe1 // crc32b r2 r11 r11
44 0x40, 0x30, 0x01, 0xe1 // crc32b r3 r1 r0
47 0x4d, 0x10, 0x07, 0xe1 // crc32b r1 r7 r13
50 0x4b, 0x30, 0x0e, 0xe1 // crc32b r3 r14 r11
53 0x41, 0xc0, 0x03, 0xe1 // crc32b r12 r3 r1
56 0x42, 0x30, 0x09, 0xe1 // crc32b r3 r9 r2
59 0x43, 0x10, 0x03, 0xe1 // crc32b r1 r3 r3
62 0x4a, 0x40, 0x05, 0xe1 // crc32b r4 r5 r10
65 0x48, 0xd0, 0x06, 0xe1 // crc32b r13 r6 r
[all...] |
| assembler-rd-rn-rm-a32-crc32cb.h | 38 0x4c, 0x22, 0x0a, 0xe1 // crc32cb r2 r10 r12
41 0x4b, 0x22, 0x0b, 0xe1 // crc32cb r2 r11 r11
44 0x40, 0x32, 0x01, 0xe1 // crc32cb r3 r1 r0
47 0x4d, 0x12, 0x07, 0xe1 // crc32cb r1 r7 r13
50 0x4b, 0x32, 0x0e, 0xe1 // crc32cb r3 r14 r11
53 0x41, 0xc2, 0x03, 0xe1 // crc32cb r12 r3 r1
56 0x42, 0x32, 0x09, 0xe1 // crc32cb r3 r9 r2
59 0x43, 0x12, 0x03, 0xe1 // crc32cb r1 r3 r3
62 0x4a, 0x42, 0x05, 0xe1 // crc32cb r4 r5 r10
65 0x48, 0xd2, 0x06, 0xe1 // crc32cb r13 r6 r
[all...] |
| assembler-rd-rn-rm-a32-crc32ch.h | 38 0x4c, 0x22, 0x2a, 0xe1 // crc32ch r2 r10 r12
41 0x4b, 0x22, 0x2b, 0xe1 // crc32ch r2 r11 r11
44 0x40, 0x32, 0x21, 0xe1 // crc32ch r3 r1 r0
47 0x4d, 0x12, 0x27, 0xe1 // crc32ch r1 r7 r13
50 0x4b, 0x32, 0x2e, 0xe1 // crc32ch r3 r14 r11
53 0x41, 0xc2, 0x23, 0xe1 // crc32ch r12 r3 r1
56 0x42, 0x32, 0x29, 0xe1 // crc32ch r3 r9 r2
59 0x43, 0x12, 0x23, 0xe1 // crc32ch r1 r3 r3
62 0x4a, 0x42, 0x25, 0xe1 // crc32ch r4 r5 r10
65 0x48, 0xd2, 0x26, 0xe1 // crc32ch r13 r6 r
[all...] |
| assembler-rd-rn-rm-a32-crc32cw.h | 38 0x4c, 0x22, 0x4a, 0xe1 // crc32cw r2 r10 r12
41 0x4b, 0x22, 0x4b, 0xe1 // crc32cw r2 r11 r11
44 0x40, 0x32, 0x41, 0xe1 // crc32cw r3 r1 r0
47 0x4d, 0x12, 0x47, 0xe1 // crc32cw r1 r7 r13
50 0x4b, 0x32, 0x4e, 0xe1 // crc32cw r3 r14 r11
53 0x41, 0xc2, 0x43, 0xe1 // crc32cw r12 r3 r1
56 0x42, 0x32, 0x49, 0xe1 // crc32cw r3 r9 r2
59 0x43, 0x12, 0x43, 0xe1 // crc32cw r1 r3 r3
62 0x4a, 0x42, 0x45, 0xe1 // crc32cw r4 r5 r10
65 0x48, 0xd2, 0x46, 0xe1 // crc32cw r13 r6 r
[all...] |
| assembler-rd-rn-rm-a32-crc32h.h | 38 0x4c, 0x20, 0x2a, 0xe1 // crc32h r2 r10 r12
41 0x4b, 0x20, 0x2b, 0xe1 // crc32h r2 r11 r11
44 0x40, 0x30, 0x21, 0xe1 // crc32h r3 r1 r0
47 0x4d, 0x10, 0x27, 0xe1 // crc32h r1 r7 r13
50 0x4b, 0x30, 0x2e, 0xe1 // crc32h r3 r14 r11
53 0x41, 0xc0, 0x23, 0xe1 // crc32h r12 r3 r1
56 0x42, 0x30, 0x29, 0xe1 // crc32h r3 r9 r2
59 0x43, 0x10, 0x23, 0xe1 // crc32h r1 r3 r3
62 0x4a, 0x40, 0x25, 0xe1 // crc32h r4 r5 r10
65 0x48, 0xd0, 0x26, 0xe1 // crc32h r13 r6 r
[all...] |
| assembler-rd-rn-rm-a32-crc32w.h | 38 0x4c, 0x20, 0x4a, 0xe1 // crc32w r2 r10 r12
41 0x4b, 0x20, 0x4b, 0xe1 // crc32w r2 r11 r11
44 0x40, 0x30, 0x41, 0xe1 // crc32w r3 r1 r0
47 0x4d, 0x10, 0x47, 0xe1 // crc32w r1 r7 r13
50 0x4b, 0x30, 0x4e, 0xe1 // crc32w r3 r14 r11
53 0x41, 0xc0, 0x43, 0xe1 // crc32w r12 r3 r1
56 0x42, 0x30, 0x49, 0xe1 // crc32w r3 r9 r2
59 0x43, 0x10, 0x43, 0xe1 // crc32w r1 r3 r3
62 0x4a, 0x40, 0x45, 0xe1 // crc32w r4 r5 r10
65 0x48, 0xd0, 0x46, 0xe1 // crc32w r13 r6 r
[all...] |
| assembler-cond-rd-memop-rs-a32-ldrh.h | 62 0xb3, 0x90, 0x92, 0xe1 // ldrh al r9 r2 plus r3 Offset
74 0xbe, 0x90, 0x9d, 0xe1 // ldrh al r9 r13 plus r14 Offset
119 0xbc, 0x50, 0x91, 0xe1 // ldrh al r5 r1 plus r12 Offset
128 0xb0, 0x90, 0x9c, 0xe1 // ldrh al r9 r12 plus r0 Offset
149 0xbc, 0x10, 0x9b, 0xe1 // ldrh al r1 r11 plus r12 Offset
155 0xbd, 0x60, 0x96, 0xe1 // ldrh al r6 r6 plus r13 Offset
272 0xb3, 0x10, 0x90, 0xe1 // ldrh al r1 r0 plus r3 Offset
281 0xbb, 0x20, 0x96, 0xe1 // ldrh al r2 r6 plus r11 Offset
299 0xb3, 0x50, 0x9e, 0xe1 // ldrh al r5 r14 plus r3 Offset
329 0xbd, 0xd0, 0x9d, 0xe1 // ldrh al r13 r13 plus r13 Offse
[all...] |
| assembler-cond-rd-memop-rs-a32-ldrsb.h | 62 0xd3, 0x90, 0x92, 0xe1 // ldrsb al r9 r2 plus r3 Offset
74 0xde, 0x90, 0x9d, 0xe1 // ldrsb al r9 r13 plus r14 Offset
119 0xdc, 0x50, 0x91, 0xe1 // ldrsb al r5 r1 plus r12 Offset
128 0xd0, 0x90, 0x9c, 0xe1 // ldrsb al r9 r12 plus r0 Offset
149 0xdc, 0x10, 0x9b, 0xe1 // ldrsb al r1 r11 plus r12 Offset
155 0xdd, 0x60, 0x96, 0xe1 // ldrsb al r6 r6 plus r13 Offset
272 0xd3, 0x10, 0x90, 0xe1 // ldrsb al r1 r0 plus r3 Offset
281 0xdb, 0x20, 0x96, 0xe1 // ldrsb al r2 r6 plus r11 Offset
299 0xd3, 0x50, 0x9e, 0xe1 // ldrsb al r5 r14 plus r3 Offset
329 0xdd, 0xd0, 0x9d, 0xe1 // ldrsb al r13 r13 plus r13 Offse
[all...] |
| assembler-cond-rd-memop-rs-a32-ldrsh.h | 62 0xf3, 0x90, 0x92, 0xe1 // ldrsh al r9 r2 plus r3 Offset
74 0xfe, 0x90, 0x9d, 0xe1 // ldrsh al r9 r13 plus r14 Offset
119 0xfc, 0x50, 0x91, 0xe1 // ldrsh al r5 r1 plus r12 Offset
128 0xf0, 0x90, 0x9c, 0xe1 // ldrsh al r9 r12 plus r0 Offset
149 0xfc, 0x10, 0x9b, 0xe1 // ldrsh al r1 r11 plus r12 Offset
155 0xfd, 0x60, 0x96, 0xe1 // ldrsh al r6 r6 plus r13 Offset
272 0xf3, 0x10, 0x90, 0xe1 // ldrsh al r1 r0 plus r3 Offset
281 0xfb, 0x20, 0x96, 0xe1 // ldrsh al r2 r6 plus r11 Offset
299 0xf3, 0x50, 0x9e, 0xe1 // ldrsh al r5 r14 plus r3 Offset
329 0xfd, 0xd0, 0x9d, 0xe1 // ldrsh al r13 r13 plus r13 Offse
[all...] |
| assembler-cond-rd-memop-rs-a32-strh.h | 62 0xb3, 0x90, 0x82, 0xe1 // strh al r9 r2 plus r3 Offset
74 0xbe, 0x90, 0x8d, 0xe1 // strh al r9 r13 plus r14 Offset
119 0xbc, 0x50, 0x81, 0xe1 // strh al r5 r1 plus r12 Offset
128 0xb0, 0x90, 0x8c, 0xe1 // strh al r9 r12 plus r0 Offset
149 0xbc, 0x10, 0x8b, 0xe1 // strh al r1 r11 plus r12 Offset
155 0xbd, 0x60, 0x86, 0xe1 // strh al r6 r6 plus r13 Offset
272 0xb3, 0x10, 0x80, 0xe1 // strh al r1 r0 plus r3 Offset
281 0xbb, 0x20, 0x86, 0xe1 // strh al r2 r6 plus r11 Offset
299 0xb3, 0x50, 0x8e, 0xe1 // strh al r5 r14 plus r3 Offset
329 0xbd, 0xd0, 0x8d, 0xe1 // strh al r13 r13 plus r13 Offse
[all...] |
| assembler-cond-rd-memop-immediate-512-a32-strh.h | 53 0xb0, 0x40, 0xcd, 0xe1 // strh al r4 r13 plus 0 Offset
89 0xb0, 0xa0, 0xc3, 0xe1 // strh al r10 r3 plus 0 Offset
92 0xb0, 0x70, 0xc9, 0xe1 // strh al r7 r9 plus 0 Offset
116 0xb0, 0xd0, 0xce, 0xe1 // strh al r13 r14 plus 0 Offset
128 0xb0, 0x50, 0xca, 0xe1 // strh al r5 r10 plus 0 Offset
137 0xb0, 0x70, 0xcc, 0xe1 // strh al r7 r12 plus 0 Offset
146 0xb0, 0x90, 0xce, 0xe1 // strh al r9 r14 plus 0 Offset
173 0xb0, 0xc0, 0xc4, 0xe1 // strh al r12 r4 plus 0 Offset
191 0xb0, 0x60, 0xc6, 0xe1 // strh al r6 r6 plus 0 Offset
338 0xb8, 0x02, 0x4b, 0xe1 // strh al r0 r11 minus 40 Offse
[all...] |
| assembler-cond-rd-memop-immediate-512-a32-ldrh.h | 53 0xb0, 0x40, 0xdd, 0xe1 // ldrh al r4 r13 plus 0 Offset
89 0xb0, 0xa0, 0xd3, 0xe1 // ldrh al r10 r3 plus 0 Offset
92 0xb0, 0x70, 0xd9, 0xe1 // ldrh al r7 r9 plus 0 Offset
116 0xb0, 0xd0, 0xde, 0xe1 // ldrh al r13 r14 plus 0 Offset
128 0xb0, 0x50, 0xda, 0xe1 // ldrh al r5 r10 plus 0 Offset
137 0xb0, 0x70, 0xdc, 0xe1 // ldrh al r7 r12 plus 0 Offset
146 0xb0, 0x90, 0xde, 0xe1 // ldrh al r9 r14 plus 0 Offset
173 0xb0, 0xc0, 0xd4, 0xe1 // ldrh al r12 r4 plus 0 Offset
191 0xb0, 0x60, 0xd6, 0xe1 // ldrh al r6 r6 plus 0 Offset
338 0xb8, 0x02, 0x5b, 0xe1 // ldrh al r0 r11 minus 40 Offse
[all...] |
| assembler-cond-rd-memop-immediate-512-a32-ldrsb.h | 53 0xd0, 0x40, 0xdd, 0xe1 // ldrsb al r4 r13 plus 0 Offset
89 0xd0, 0xa0, 0xd3, 0xe1 // ldrsb al r10 r3 plus 0 Offset
92 0xd0, 0x70, 0xd9, 0xe1 // ldrsb al r7 r9 plus 0 Offset
116 0xd0, 0xd0, 0xde, 0xe1 // ldrsb al r13 r14 plus 0 Offset
128 0xd0, 0x50, 0xda, 0xe1 // ldrsb al r5 r10 plus 0 Offset
137 0xd0, 0x70, 0xdc, 0xe1 // ldrsb al r7 r12 plus 0 Offset
146 0xd0, 0x90, 0xde, 0xe1 // ldrsb al r9 r14 plus 0 Offset
173 0xd0, 0xc0, 0xd4, 0xe1 // ldrsb al r12 r4 plus 0 Offset
191 0xd0, 0x60, 0xd6, 0xe1 // ldrsb al r6 r6 plus 0 Offset
338 0xd8, 0x02, 0x5b, 0xe1 // ldrsb al r0 r11 minus 40 Offse
[all...] |
| assembler-cond-rd-memop-immediate-512-a32-ldrsh.h | 53 0xf0, 0x40, 0xdd, 0xe1 // ldrsh al r4 r13 plus 0 Offset
89 0xf0, 0xa0, 0xd3, 0xe1 // ldrsh al r10 r3 plus 0 Offset
92 0xf0, 0x70, 0xd9, 0xe1 // ldrsh al r7 r9 plus 0 Offset
116 0xf0, 0xd0, 0xde, 0xe1 // ldrsh al r13 r14 plus 0 Offset
128 0xf0, 0x50, 0xda, 0xe1 // ldrsh al r5 r10 plus 0 Offset
137 0xf0, 0x70, 0xdc, 0xe1 // ldrsh al r7 r12 plus 0 Offset
146 0xf0, 0x90, 0xde, 0xe1 // ldrsh al r9 r14 plus 0 Offset
173 0xf0, 0xc0, 0xd4, 0xe1 // ldrsh al r12 r4 plus 0 Offset
191 0xf0, 0x60, 0xd6, 0xe1 // ldrsh al r6 r6 plus 0 Offset
338 0xf8, 0x02, 0x5b, 0xe1 // ldrsh al r0 r11 minus 40 Offse
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey/Include/Guid/ |
| HiKeyVariable.h | 20 { 0x66b8d063, 0x1daa, 0x4c60, { 0xb9, 0xf2, 0x55, 0x0d, 0x7e, 0xe1, 0x2f, 0x38 } }
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Guid/ |
| SmmCommunicate.h | 28 0xf328e36c, 0x23b6, 0x4a95, {0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 } \
|
| /device/linaro/bootloader/edk2/OvmfPkg/Include/Guid/ |
| XenBusRootDevice.h | 20 {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Include/Protocol/ |
| PlatformSmmSpiReady.h | 22 { 0x7a5dbc75, 0x5b2b, 0x4e67, 0xbd, 0xe1, 0xd4, 0x8e, 0xee, 0x76, 0x15, 0x62 }
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| propkey.h | 38 DEFINE_PROPERTYKEY(PKEY_AppUserModel_ExcludeFromShowInNewInstall, 0x9f4c2855,0x9f79,0x4b39,0xa8,0xd0,0xe1,0xd4,0x2d,0xe1,0xd5,0xf3,8);
39 DEFINE_PROPERTYKEY(PKEY_AppUserModel_ID, 0x9f4c2855,0x9f79,0x4B39,0xa8,0xd0,0xe1,0xd4,0x2d,0xe1,0xd5,0xf3,5);
40 DEFINE_PROPERTYKEY(PKEY_AppUserModel_IsDestListSeparator, 0x9f4c2855,0x9f79,0x4b39,0xa8,0xd0,0xe1,0xd4,0x2d,0xe1,0xd5,0xf3,6);
41 DEFINE_PROPERTYKEY(PKEY_AppUserModel_PreventPinning, 0x9f4c2855,0x9F79,0x4b39,0xa8,0xd0,0xe1,0xd4,0x2d,0xe1,0xd5,0xf3,9);
42 DEFINE_PROPERTYKEY(PKEY_AppUserModel_RelaunchCommand, 0x9f4c2855,0x9f79,0x4b39,0xa8,0xd0,0xe1,0xd4,0x2d,0xe1,0xd5,0xf3,2)
[all...] |
| /external/llvm/test/MC/ARM/ |
| load-store-acquire-release-v8.s | 8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1]
9 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1]
10 @ CHECK: ldaex r1, [r7] @ encoding: [0x9f,0x1e,0x97,0xe1]
11 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1]
21 @ CHECK: stlexb r1, r3, [r4] @ encoding: [0x93,0x1e,0xc4,0xe1]
22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1]
33 @ CHECK: lda r5, [r6] @ encoding: [0x9f,0x5c,0x96,0xe1]
34 @ CHECK: ldab r5, [r6] @ encoding: [0x9f,0x5c,0xd6,0xe1]
[all...] |
| move-banked-regs.s | 11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1]
12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1]
13 @ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x02,0xe1]
14 @ CHECK-ARM: mrs r7, r11_usr @ encoding: [0x00,0x72,0x03,0xe1]
15 @ CHECK-ARM: mrs r11, r12_usr @ encoding: [0x00,0xb2,0x04,0xe1]
16 @ CHECK-ARM: mrs r1, sp_usr @ encoding: [0x00,0x12,0x05,0xe1]
17 @ CHECK-ARM: mrs r2, lr_usr @ encoding: [0x00,0x22,0x06,0xe1]
19 @ CHECK-THUMB: mrs r3, r9_usr @ encoding: [0xe1,0xf3,0x20,0x83]
34 @ CHECK-ARM: mrs r2, r8_fiq @ encoding: [0x00,0x22,0x08,0xe1]
35 @ CHECK-ARM: mrs r3, r9_fiq @ encoding: [0x00,0x32,0x09,0xe1]
[all...] |
| ldrd-strd-gnu-arm.s | 8 @ CHECK: ldrd r0, r1, [r10, #32]! @ encoding: [0xd0,0x02,0xea,0xe1]
10 @ CHECK: ldrd r0, r1, [r10, #32] @ encoding: [0xd0,0x02,0xca,0xe1]
15 @ CHECK: strd r0, r1, [r10, #32]! @ encoding: [0xf0,0x02,0xea,0xe1]
17 @ CHECK: strd r0, r1, [r10, #32] @ encoding: [0xf0,0x02,0xca,0xe1]
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/ |
| SmmFaultTolerantWrite.h | 26 0x3868fc3b, 0x7e45, 0x43a7, { 0x90, 0x6c, 0x4b, 0xa4, 0x7d, 0xe1, 0x75, 0x4d } \
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Guid/ |
| PchInitVar.h | 32 #define PCH_INIT_VARIABLE_GUID {0xe6c2f70a, 0xb604, 0x4877,{0x85, 0xba, 0xde, 0xec, 0x89, 0xe1, 0x17, 0xeb}}
|
