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  /external/vixl/test/aarch32/
test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc 87 Register rn; member in struct:vixl::aarch32::__anon38302::Operands
5161 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-memop-immediate-512-a32.cc 138 Register rn; member in struct:vixl::aarch32::__anon38329::Operands
3388 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-memop-immediate-8192-a32.cc 138 Register rn; member in struct:vixl::aarch32::__anon38330::Operands
3388 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-memop-rs-a32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38331::Operands
3399 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc 138 Register rn; member in struct:vixl::aarch32::__anon38332::Operands
3393 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc 138 Register rn; member in struct:vixl::aarch32::__anon38333::Operands
3393 Register rn = kTests[i].operands.rn; local
    [all...]
test-simulator-cond-rd-operand-rn-a32.cc 148 Register rn; member in struct:vixl::aarch32::__anon38337::Operands
155 uint32_t rn; member in struct:vixl::aarch32::__anon38337::Inputs
590 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-cmn.h"
591 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-cmp.h"
592 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-mov.h"
593 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-movs.h"
594 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-mvn.h"
595 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-mvns.h"
596 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-teq.h"
597 #include "aarch32/traces/simulator-cond-rd-operand-rn-a32-tst.h
648 Register rn = kTests[i].operands.rn; local
740 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-ror-amount-a32.cc 140 Register rn; member in struct:vixl::aarch32::__anon38338::Operands
149 uint32_t rn; member in struct:vixl::aarch32::__anon38338::Inputs
725 Register rn = kTests[i].operands.rn; local
819 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-ror-amount-t32.cc 140 Register rn; member in struct:vixl::aarch32::__anon38339::Operands
149 uint32_t rn; member in struct:vixl::aarch32::__anon38339::Inputs
725 Register rn = kTests[i].operands.rn; local
819 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38340::Operands
151 uint32_t rn; member in struct:vixl::aarch32::__anon38340::Inputs
1019 Register rn = kTests[i].operands.rn; local
1113 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38341::Operands
151 uint32_t rn; member in struct:vixl::aarch32::__anon38341::Inputs
1019 Register rn = kTests[i].operands.rn; local
1113 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38342::Operands
151 uint32_t rn; member in struct:vixl::aarch32::__anon38342::Inputs
1029 Register rn = kTests[i].operands.rn; local
1123 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38343::Operands
151 uint32_t rn; member in struct:vixl::aarch32::__anon38343::Inputs
1029 Register rn = kTests[i].operands.rn; local
1123 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-rs-a32.cc 142 Register rn; member in struct:vixl::aarch32::__anon38344::Operands
151 uint32_t rn; member in struct:vixl::aarch32::__anon38344::Inputs
1722 Register rn = kTests[i].operands.rn; local
1821 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-shift-rs-t32.cc 136 Register rn; member in struct:vixl::aarch32::__anon38345::Operands
145 uint32_t rn; member in struct:vixl::aarch32::__anon38345::Inputs
1710 Register rn = kTests[i].operands.rn; local
1809 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-operand-rn-t32.cc 148 Register rn; member in struct:vixl::aarch32::__anon38346::Operands
155 uint32_t rn; member in struct:vixl::aarch32::__anon38346::Inputs
590 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-cmn.h"
591 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-cmp.h"
592 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mov.h"
593 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-movs.h"
594 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mvn.h"
595 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-mvns.h"
596 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-teq.h"
597 #include "aarch32/traces/simulator-cond-rd-operand-rn-t32-tst.h
648 Register rn = kTests[i].operands.rn; local
740 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-a32.cc 141 Register rn; member in struct:vixl::aarch32::__anon38347::Operands
148 uint32_t rn; member in struct:vixl::aarch32::__anon38347::Inputs
1362 Register rn = kTests[i].operands.rn; local
1453 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-const-a32.cc 154 Register rn; member in struct:vixl::aarch32::__anon38348::Operands
162 uint32_t rn; member in struct:vixl::aarch32::__anon38348::Inputs
1639 Register rn = kTests[i].operands.rn; local
1732 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-const-t32.cc 154 Register rn; member in struct:vixl::aarch32::__anon38349::Operands
162 uint32_t rn; member in struct:vixl::aarch32::__anon38349::Inputs
1663 Register rn = kTests[i].operands.rn; local
1756 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-imm12-t32.cc 136 Register rn; member in struct:vixl::aarch32::__anon38350::Operands
143 uint32_t rn; member in struct:vixl::aarch32::__anon38350::Inputs
1446 Register rn = kTests[i].operands.rn; local
1516 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-rm-a32.cc 168 Register rn; member in struct:vixl::aarch32::__anon38351::Operands
176 uint32_t rn; member in struct:vixl::aarch32::__anon38351::Inputs
1132 Register rn = kTests[i].operands.rn; local
1230 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc 140 Register rn; member in struct:vixl::aarch32::__anon38352::Operands
150 uint32_t rn; member in struct:vixl::aarch32::__anon38352::Inputs
1131 Register rn = kTests[i].operands.rn; local
1231 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc 140 Register rn; member in struct:vixl::aarch32::__anon38353::Operands
150 uint32_t rn; member in struct:vixl::aarch32::__anon38353::Inputs
1131 Register rn = kTests[i].operands.rn; local
1231 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc 154 Register rn; member in struct:vixl::aarch32::__anon38354::Operands
164 uint32_t rn; member in struct:vixl::aarch32::__anon38354::Inputs
1449 Register rn = kTests[i].operands.rn; local
1549 uint32_t rn = results[i]->outputs[j].rn; local
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
h8500-dis.c 95 int rn = 0; local
126 case RN:
127 rn = buffer[byte] & 0x7;
221 func (stream, "@(0x%x:16,r%d)", disp, rn);
224 func (stream, "@(0x%x:8 (%d),r%d)", disp & 0xff, disp, rn);
239 case RN:
240 func (stream, "r%d", rn);
249 func (stream, "@-r%d", rn);
252 func (stream, "@r%d+", rn);
255 func (stream, "@r%d", rn);
    [all...]

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