| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sparc/ |
| tlssunbin64.dd | 213 +1020a0: 01 00 00 00 nop *
214 +1020a4: 01 00 00 00 nop *
215 +1020a8: 01 00 00 00 nop *
216 +1020ac: 17 00 00 00 sethi %hi\(0\), %o3
217 +1020b0: 9a 1a ff b4 xor %o3, -76, %o5
218 +1020b4: a4 10 00 0d mov %o5, %l2
219 +1020b8: a4 01 c0 12 add %g7, %l2, %l2
220 +1020bc: 01 00 00 00 nop *
221 +1020c0: 01 00 00 00 nop *
222 +1020c4: 01 00 00 00 nop
[all...] |
| gotop32.dd | 21 +1020: 01 00 00 00 nop *
|
| /external/llvm/test/CodeGen/X86/ |
| win-alloca-expander.ll | 23 ; CHECK: subl $1020, %esp
57 ; CHECK: subl $1020, %esp
77 ; CHECK: subl $1020, %esp
86 ; CHECK: subl $1020, %esp
123 ; CHECK: subl $1020, %esp
|
| addr-mode-matcher.ll | 24 ; %load1 = (load (and (shl %xor, 2), 1020))
26 %tmp1702 = and i32 %tmp1701, 1020
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| float.s | 156 sfm f2, 4, [r14, #1020]!
157 sfmeq f7, 3, [r8], #-1020
|
| copro.s | 8 ldcmi 0, cr0, [r2, #1020]!
|
| maverick.d | 11 0*0 <load_store> 0d ?9d ?54 ?ff ? * cfldrseq mvf5, ?\[sp, #1020\].*
14 0*c <load_store\+0xc> bd ?1a ?04 ?ff ? * cfldrslt mvf0, ?\[sl, #-1020\].*
17 0*18 <load_store\+0x18> 2d ?30 ?94 ?ff ? * cfldrscs mvf9, ?\[r0, #-1020\]!.*
20 0*24 <load_store\+0x24> 6d ?30 ?b4 ?ff ? * cfldrsvs mvf11, ?\[r0, #-1020\]!.*
23 0*30 <load_store\+0x30> 2c ?30 ?94 ?ff ? * cfldrscs mvf9, ?\[r0\], #-1020.*
26 0*3c <load_store\+0x3c> 6d ?50 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0, #-1020\].*
29 0*48 <load_store\+0x48> 2d ?50 ?94 ?ff ? * cfldrdcs mvd9, ?\[r0, #-1020\].*
32 0*54 <load_store\+0x54> 6d ?70 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0, #-1020\]!.*
35 0*60 <load_store\+0x60> 2d ?70 ?94 ?ff ? * cfldrdcs mvd9, ?\[r0, #-1020\]!.*
38 0*6c <load_store\+0x6c> 6c ?70 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0\], #-1020.
[all...] |
| thumb.s | 83 str r3, [r13, #1020]
87 add r7, r15, #1020
|
| /external/libvorbis/vq/ |
| 44u3.vqs | 31 :_p7_0 44u3/res_part7_pass0.vqd, 2, nonseq, 0 +- 255 510 765 1020
|
| 44u4.vqs | 31 :_p7_0 44u4/res_part7_pass0.vqd, 2, nonseq, 0 +- 255 510 765 1020 1275 1530
|
| 44c3.vqs | 34 :_p9_0 44c3_s/res_part9_pass0.vqd, 2, nonseq, 0 +- 255 510 765 1020 1275 1530
|
| 44u5.vqs | 33 :_p9_0 44u5/res_part9_pass0.vqd, 2, nonseq, 0 +- 255 510 765 1020 1275 1530
|
| 44u6.vqs | 33 :_p9_0 44u6/res_part9_pass0.vqd, 2, nonseq, 0 +- 255 510 765 1020 1275 1530 1785
|
| /external/llvm/test/CodeGen/ARM/ |
| thumb1-varalloc.ll | 88 ; CHECK: add [[RTMP:r[0-9]+]], sp, #1020
100 %addr2 = alloca i8, i32 1020
102 ; CHECK: add r0, sp, #1020
117 ; CHECK: add r0, sp, #1020
|
| /external/llvm/test/MC/MachO/ |
| x86_32-scattered-reloc-fallback.s | 29 // CHECK: 1020F50: 90909090 90C70564 75530100 000000 |.......duS.....|
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| fold-and-shift.ll | 6 %tmp4 = and i32 %tmp2, 1020 ; <i32> [#uses=1]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| rd-v10_32o-2.d | 37 1020d: 0000 bcc \.\+2
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| macros.inc | 31 macro dsp8L 1020
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| farcall-group-size2.d | 21 1020: eb000008 bl 1048 <__bar3_veneer>
|
| /external/skia/tests/ |
| PathOpsCubicQuadIntersectionTest.cpp | 26 {{{1020,672}, {1020,640.93396}, {998.03302,618.96698}}}},
|
| /system/extras/tests/memtest/ |
| fptest.cpp | 60 for(int i=0; i<1020; i++) {
89 for(int i=0; i<1020 * 4; i++) {
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ldtoc-inv.ll | 31 %cmp = icmp slt i64 %indvars.iv.next, 1020
|
| /external/llvm/test/CodeGen/Thumb/ |
| inlineasm-imm-thumb.ll | 29 %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
|
| /external/lzma/CPP/7zip/UI/FileManager/ |
| PropertyNameRes.h | 20 #define IDS_PROP_FILE_TYPE 1020
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/ |
| inlineasm-imm-thumb.ll | 29 %y = call i32 asm "add $0, sp, $1", "=r,M"( i32 1020 ) nounwind
|
