| /external/llvm/test/CodeGen/ARM/ |
| fold-const.ll | 6 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv, i1 true)
14 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| fold-const.ll | 6 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv)
14 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/ |
| ct32.ll | 3 declare i32 @llvm.ctlz.i32(i32)
8 %b = call i32 @llvm.ctlz.i32( i32 %B )
|
| ct64.ll | 3 declare i64 @llvm.ctlz.i64(i64)
8 %b = call i64 @llvm.ctlz.i64( i64 %B )
|
| promote-setcc.ll | 10 declare i16 @llvm.ctlz.i16(i16)
12 ; Case (srl (ctlz x), 5) == const
13 ; Note: ctlz is promoted, so this test does not catch the DAG combiner
16 %c = call i16 @llvm.ctlz.i16(i16 %x)
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| 2007-03-24-cntlzd.ll | 5 %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1]
12 declare i64 @llvm.ctlz.i64(i64)
|
| /external/clang/test/CodeGen/ |
| mips-count-builtins.c | 3 // Test that the ctlz and cttz builtins are defined for zero.
13 // CHECK: call i16 @llvm.ctlz.i16(i16 {{.*}}, i1 false)
22 // CHECK: call i32 @llvm.ctlz.i32(i32 {{.*}}, i1 false)
30 // CHECK: call i64 @llvm.ctlz.i64(i64 {{.*}}, i1 false)
|
| builtin-count-zeros.c | 6 // CHECK: call i32 @llvm.ctlz.i32({{.*}}, i1 true)
8 // CHECK-ARM: call i32 @llvm.ctlz.i32({{.*}}, i1 false)
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-clrsb.ll | 7 declare i32 @llvm.ctlz.i32(i32, i1) #0
8 declare i64 @llvm.ctlz.i64(i64, i1) #1
17 %0 = tail call i32 @llvm.ctlz.i32(i32 %add, i1 false)
31 %0 = tail call i64 @llvm.ctlz.i64(i64 %add, i1 false)
|
| /external/llvm/test/Transforms/CodeGenPrepare/X86/ |
| cttz-ctlz.ll | 33 define i64 @ctlz(i64 %A) {
35 %z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
38 ; SLOW-LABEL: @ctlz(
43 ; SLOW: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 true)
49 ; FAST_LZ-LABEL: @ctlz(
50 ; FAST_LZ: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
55 declare i64 @llvm.ctlz.i64(i64, i1)
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| non-vectorizable-intrinsic.ll | 6 ; CTLZ cannot be vectorized currently because the second argument is a scalar
9 ; Test causes an assert if LLVM tries to vectorize CTLZ.
14 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
17 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
26 %call.i = call i8 @llvm.ctlz.i8(i8 %0, i1 false)
27 %call.i4 = call i8 @llvm.ctlz.i8(i8 %1, i1 false)
33 declare i8 @llvm.ctlz.i8(i8, i1) #3
|
| ctlz.ll | 17 declare i64 @llvm.ctlz.i64(i64, i1)
18 declare i32 @llvm.ctlz.i32(i32, i1)
19 declare i16 @llvm.ctlz.i16(i16, i1)
20 declare i8 @llvm.ctlz.i8(i8, i1)
23 ; CTLZ
30 ; CHECK-NEXT: [[CTLZ0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[LD0]], i1 false)
31 ; CHECK-NEXT: [[CTLZ1:%.*]] = call i64 @llvm.ctlz.i64(i64 [[LD1]], i1 false)
38 %ctlz0 = call i64 @llvm.ctlz.i64(i64 %ld0, i1 0)
39 %ctlz1 = call i64 @llvm.ctlz.i64(i64 %ld1, i1 0)
51 ; CHECK-NEXT: [[CTLZ0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[LD0]], i1 false
[all...] |
| /external/swiftshader/third_party/subzero/crosstest/ |
| test_bitmanip_intrin.ll | 5 ; can be two, as is the case for ctlz and cttz.
7 declare i32 @llvm.ctlz.i32(i32, i1)
8 declare i64 @llvm.ctlz.i64(i64, i1)
17 %x = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
22 %x = call i64 @llvm.ctlz.i64(i64 %a, i1 0)
|
| /external/llvm/test/Assembler/ |
| auto_upgrade_intrinsics.ll | 5 declare i8 @llvm.ctlz.i8(i8)
6 declare i16 @llvm.ctlz.i16(i16)
7 declare i32 @llvm.ctlz.i32(i32)
8 declare i42 @llvm.ctlz.i42(i42) ; Not a power-of-2
14 define void @test.ctlz(i8 %a, i16 %b, i32 %c, i42 %d) {
15 ; CHECK: @test.ctlz
18 ; CHECK: call i8 @llvm.ctlz.i8(i8 %a, i1 false)
19 call i8 @llvm.ctlz.i8(i8 %a)
20 ; CHECK: call i16 @llvm.ctlz.i16(i16 %b, i1 false)
21 call i16 @llvm.ctlz.i16(i16 %b
[all...] |
| /external/llvm/test/Transforms/SimplifyCFG/PowerPC/ |
| cttz-ctlz-spec.ll | 8 ; CHECK-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
9 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTLZ]]
16 %0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
28 ; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTLZ]]
43 declare i64 @llvm.ctlz.i64(i64, i1)
|
| /external/llvm/test/CodeGen/Generic/ |
| llvm-ct-intrinsics.ll | 24 declare i64 @llvm.ctlz.i64(i64, i1)
26 declare i32 @llvm.ctlz.i32(i32, i1)
28 declare i16 @llvm.ctlz.i16(i16, i1)
30 declare i8 @llvm.ctlz.i8(i8, i1)
33 %a = call i8 @llvm.ctlz.i8( i8 %A, i1 true ) ; <i8> [#uses=1]
34 %b = call i16 @llvm.ctlz.i16( i16 %B, i1 true ) ; <i16> [#uses=1]
35 %c = call i32 @llvm.ctlz.i32( i32 %C, i1 true ) ; <i32> [#uses=1]
36 %d = call i64 @llvm.ctlz.i64( i64 %D, i1 true ) ; <i64> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/ |
| ctlz-v.ll | 4 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
16 %ret = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true)
|
| /external/llvm/test/Feature/ |
| intrinsics.ll | 27 declare i8 @llvm.ctlz.i8(i8, i1)
29 declare i16 @llvm.ctlz.i16(i16, i1)
31 declare i32 @llvm.ctlz.i32(i32, i1)
33 declare i64 @llvm.ctlz.i64(i64, i1)
50 call i8 @llvm.ctlz.i8( i8 14, i1 true ) ; <i32>:9 [#uses=0]
51 call i16 @llvm.ctlz.i16( i16 15, i1 true ) ; <i32>:10 [#uses=0]
52 call i32 @llvm.ctlz.i32( i32 16, i1 true ) ; <i32>:11 [#uses=0]
53 call i64 @llvm.ctlz.i64( i64 17, i1 true ) ; <i32>:12 [#uses=0]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Generic/ |
| llvm-ct-intrinsics.ll | 24 declare i64 @llvm.ctlz.i64(i64)
26 declare i32 @llvm.ctlz.i32(i32)
28 declare i16 @llvm.ctlz.i16(i16)
30 declare i8 @llvm.ctlz.i8(i8)
33 %a = call i8 @llvm.ctlz.i8( i8 %A ) ; <i8> [#uses=1]
34 %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
35 %c = call i32 @llvm.ctlz.i32( i32 %C ) ; <i32> [#uses=1]
36 %d = call i64 @llvm.ctlz.i64( i64 %D ) ; <i64> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
| 2008-08-08-ctlz.ll | 8 call i32 @llvm.ctlz.i32( i32 %u )
12 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| vec_ctbits.ll | 4 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>)
12 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a)
|
| /external/swiftshader/third_party/LLVM/test/Feature/ |
| intrinsics.ll | 27 declare i8 @llvm.ctlz.i8(i8)
29 declare i16 @llvm.ctlz.i16(i16)
31 declare i32 @llvm.ctlz.i32(i32)
33 declare i64 @llvm.ctlz.i64(i64)
51 call i8 @llvm.ctlz.i8( i8 14 ) ; <i32>:9 [#uses=0]
52 call i16 @llvm.ctlz.i16( i16 15 ) ; <i32>:10 [#uses=0]
53 call i32 @llvm.ctlz.i32( i32 16 ) ; <i32>:11 [#uses=0]
54 call i64 @llvm.ctlz.i64( i64 17 ) ; <i32>:12 [#uses=0]
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| bitcount.ll | 8 declare i33 @llvm.ctlz.i33(i33 %val)
13 %c3 = call i33 @llvm.ctlz.i33(i33 87359874)
|
| /external/llvm/test/Transforms/SimplifyCFG/AArch64/ |
| cttz-ctlz.ll | 3 define i32 @ctlz(i32 %A) {
4 ; CHECK-LABEL: @ctlz(
6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
14 %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
41 declare i32 @llvm.ctlz.i32(i32, i1)
|
| /external/llvm/test/Transforms/SimplifyCFG/ARM/ |
| cttz-ctlz.ll | 3 define i32 @ctlz(i32 %A) {
4 ; CHECK-LABEL: @ctlz(
6 ; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
14 %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
41 declare i32 @llvm.ctlz.i32(i32, i1)
|
