| /external/llvm/test/Bitcode/ |
| arm32_neon_vcnt_upgrade.ll | 9 ;CHECK: {{call.*@llvm.ctlz.v4i16\(<4 x i16>.*, i1 false}}
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/ |
| 2009-01-01-BrCond.ll | 29 ; declare i32 @llvm.ctlz.i32(i32) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| intrinsics.ll | 9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
11 declare i8 @llvm.ctlz.i8(i8) nounwind readnone
171 define i8 @ctlz(i8 %a) {
175 %count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
177 ; CHECK: @ctlz
184 %lz = tail call i32 @llvm.ctlz.i32(i32 %a) nounwind readnone
206 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
|
| sext.ll | 6 declare i32 @llvm.ctlz.i32(i32)
19 %t = call i32 @llvm.ctlz.i32(i32 %x)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| rm-zext.ll | 75 %0 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
84 declare i32 @llvm.ctlz.i32(i32, i1) #0
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| clz.ll | 21 declare i32 @llvm.ctlz.i32(i32, i1)
47 %x = call i32 @llvm.ctlz.i32(i32 %a, i1 0)
|
| /external/llvm/test/CodeGen/X86/ |
| vec_ctbits.ll | 5 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
40 %c = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %a, i1 true)
71 declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
115 %c = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %a, i1 false)
|
| vector-lzcnt-512.ll | 10 %out = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %in, i1 0)
19 %out = call <8 x i64> @llvm.ctlz.v8i64(<8 x i64> %in, i1 -1)
28 %out = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %in, i1 0)
37 %out = call <16 x i32> @llvm.ctlz.v16i32(<16 x i32> %in, i1 -1)
69 %out = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %in, i1 0)
101 %out = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %in, i1 -1)
157 %out = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %in, i1 0)
213 %out = call <64 x i8> @llvm.ctlz.v64i8(<64 x i8> %in, i1 -1)
217 declare <8 x i64> @llvm.ctlz.v8i64(<8 x i64>, i1)
218 declare <16 x i32> @llvm.ctlz.v16i32(<16 x i32>, i1
[all...] |
| vector-lzcnt-256.ll | 78 %out = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %in, i1 0)
148 %out = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> %in, i1 -1)
232 %out = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %in, i1 0)
307 %out = call <8 x i32> @llvm.ctlz.v8i32(<8 x i32> %in, i1 -1)
374 %out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 0)
441 %out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 -1)
515 %out = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %in, i1 0)
589 %out = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %in, i1 -1)
608 %out = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>, i1 0)
627 %out = call <4 x i64> @llvm.ctlz.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>, i1 -1
[all...] |
| /external/llvm/test/CodeGen/Lanai/ |
| i32.ll | 12 declare i32 @llvm.ctlz.i32(i32, i1) #1
113 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
121 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
| mips64instrs.ll | 119 declare i64 @llvm.ctlz.i64(i64) nounwind readnone
124 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X)
132 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg)
|
| /external/llvm/test/Transforms/InstCombine/ |
| intrinsics.ll | 17 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
19 declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
283 define i8 @ctlz(i8 %a) {
287 %count = tail call i8 @llvm.ctlz.i8(i8 %and, i1 true) nounwind readnone
289 ; CHECK-LABEL: @ctlz(
296 %lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false) nounwind readnone
317 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
328 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
337 %ctlz = call i32 @llvm.ctlz.i32(i32 0, i1 true
[all...] |
| sext.ll | 6 declare i32 @llvm.ctlz.i32(i32, i1)
19 %t = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| intrinsic.ll | 121 declare i32 @llvm.ctlz.i32(i32,i1) nounwind readnone
128 %call1 = tail call i32 @llvm.ctlz.i32(i32 %add1,i1 true) nounwind readnone
135 %call2 = tail call i32 @llvm.ctlz.i32(i32 %add2,i1 true) nounwind readnone
142 %call3 = tail call i32 @llvm.ctlz.i32(i32 %add3,i1 true) nounwind readnone
149 %call4 = tail call i32 @llvm.ctlz.i32(i32 %add4,i1 true) nounwind readnone
163 ; CHECK: call <4 x i32> @llvm.ctlz.v4i32
173 %call1 = tail call i32 @llvm.ctlz.i32(i32 %add1,i1 true) nounwind readnone
180 %call2 = tail call i32 @llvm.ctlz.i32(i32 %add2,i1 false) nounwind readnone
187 %call3 = tail call i32 @llvm.ctlz.i32(i32 %add3,i1 true) nounwind readnone
194 %call4 = tail call i32 @llvm.ctlz.i32(i32 %add4,i1 false) nounwind readnon
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/assembler/x86/ |
| immediate_encodings.ll | 358 ; for ctlz 64-bit, so we use those to test the "test" instruction.
374 declare i64 @llvm.ctlz.i64(i64, i1)
378 %r = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
379 %r2 = call i64 @llvm.ctlz.i64(i64 %y, i1 false)
380 %r3 = call i64 @llvm.ctlz.i64(i64 %z, i1 false)
381 %r4 = call i64 @llvm.ctlz.i64(i64 %w, i1 false)
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64instrs.ll | 183 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
194 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
208 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
|
| /external/llvm/test/CodeGen/WebAssembly/ |
| i32.ll | 8 declare i32 @llvm.ctlz.i32(i32, i1)
148 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
158 %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
|
| i64.ll | 8 declare i64 @llvm.ctlz.i64(i64, i1)
148 %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
158 %a = call i64 @llvm.ctlz.i64(i64 %x, i1 true)
|
| i128.ll | 8 declare i128 @llvm.ctlz.i128(i128, i1)
164 %a = call i128 @llvm.ctlz.i128(i128 %x, i1 false)
175 %a = call i128 @llvm.ctlz.i128(i128 %x, i1 true)
|
| /external/clang/test/CodeGen/ |
| arm_acle.c | 150 // ARM: call i32 @llvm.ctlz.i32(i32 %t, i1 false)
156 // AArch32: call i32 @llvm.ctlz.i32(i32 %t, i1 false)
157 // AArch64: call i64 @llvm.ctlz.i64(i64 %t, i1 false)
163 // ARM: call i64 @llvm.ctlz.i64(i64 %t, i1 false)
|
| /external/llvm/test/Transforms/BBVectorize/ |
| simple-int.ll | 18 declare i64 @llvm.ctlz.i64(i64, i1)
392 ; Basic depth-3 chain with ctlz
396 %Y1 = call i64 @llvm.ctlz.i64(i64 %X1, i1 true)
397 %Y2 = call i64 @llvm.ctlz.i64(i64 %X2, i1 true)
409 ; CHECK: %Y1 = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %X1, i1 true)
418 ; Basic depth-3 chain with ctlz
422 %Y1 = call i64 @llvm.ctlz.i64(i64 %X1, i1 true)
423 %Y2 = call i64 @llvm.ctlz.i64(i64 %X2, i1 false)
432 ; CHECK: %Y1 = call i64 @llvm.ctlz.i64(i64 %X1, i1 true)
433 ; CHECK: %Y2 = call i64 @llvm.ctlz.i64(i64 %X2, i1 false
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceIntrinsics.cpp | 130 INTRIN(Ctlz, SideEffects_F, ReturnsTwice_F, MemoryWrite_F) \
133 , "llvm.ctlz." NameSuffix \
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| nacl-other-intrinsics.ll | 56 declare i32 @llvm.ctlz.i32(i32, i1)
57 declare i64 @llvm.ctlz.i64(i64, i1)
452 %r = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
470 %r = call i32 @llvm.ctlz.i32(i32 123456, i1 false)
485 %ignored = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
493 %r = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
523 %r = call i64 @llvm.ctlz.i64(i64 123456789012, i1 false)
542 %ignored = call i64 @llvm.ctlz.i64(i64 1234567890, i1 false)
|
| /external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
| nacl-other-intrinsics.ll | 24 declare i32 @llvm.ctlz.i32(i32, i1)
25 declare i64 @llvm.ctlz.i64(i64, i1)
273 %r = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
279 ; CHECK-NEXT: %r = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
285 %r = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
291 ; CHECK-NEXT: %r = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
|
| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 183 Function *CTLZ = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
242 // ; %tmp0 = tail call i32 @llvm.ctlz.i32(i32 %divisor, i1 true)
243 // ; %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %dividend, i1 true)
255 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True});
256 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True});
|
