| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrSSE.td | [all...] |
| X86InstrInfo.cpp | [all...] |
| X86RegisterInfo.td | 227 def EFLAGS : Register<"flags">;
471 def CCR : RegisterClass<"X86", [i32], 32, (add EFLAGS)> {
|
| X86FrameLowering.cpp | 180 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
661 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
756 // The EFLAGS implicit def is dead.
861 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit)
868 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit)
[all...] |
| X86GenInstrInfo.inc | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 434 /// would clobber the EFLAGS condition register. Note the result may be
440 /// True if MI has a condition code def, e.g. EFLAGS, that is
|
| X86ISelLowering.h | 93 /// X86 SetCC. Operand 0 is condition code, and operand 1 is the EFLAGS
522 // Store contents of %ah into %eflags.
550 /// EFLAGS, OUTCHAIN = LADD(INCHAIN, PTR, RHS)
[all...] |
| /external/llvm/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | 557 // %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
559 // %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
565 // %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
567 // %reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>
573 // %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| TwoAddressInstructionPass.cpp | 537 // %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
539 // %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
545 // %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
547 // %reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>
553 // %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
[all...] |
| /external/valgrind/memcheck/docs/ |
| mc-tech-docs.xml | 654 its <computeroutput>%eflags</computeroutput> register.</para>
690 flags, <computeroutput>%EFLAGS</computeroutput>.</para>
[all...] |
| /device/linaro/bootloader/edk2/DuetPkg/BootSector/ |
| efi32.S | 885 ## eflags
[all...] |
| /external/valgrind/coregrind/m_sigframe/ |
| sigframe-ppc32-linux.c | 67 delivering a signal, the integer registers and %eflags are
489 //.. sc->eflags = LibVEX_GuestX86_get_eflags(&tst->arch.vex);
802 //.. //:: tst->arch.vex.guest_eflags = sc->eflags;
|
| /prebuilts/clang/host/darwin-x86/clang-3957855/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-3960126/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-3977809/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3957855/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3960126/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-3977809/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/lib64/clang/5.0/include/ |
| avxintrin.h | [all...] |
| /art/runtime/ |
| dex_instruction.cc | 63 #define INSTRUCTION_DESCR(opcode, c, p, format, index, flags, eflags, vflags) \
|
| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| processor_32.h | 179 unsigned long eflags; member in struct:i386_hw_tss
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Protocol/LegacyBios/ |
| LegacyBios.h | 110 EFI_EFLAGS_REG EFlags;
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Framework/ |
| SmmCis.h | 179 UINT32 EFLAGS;
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 114 UINT32 Eflags;
|
