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  /external/swiftshader/third_party/LLVM/test/CodeGen/X86/
shl-anyext.ll 37 %tmp9 = lshr i64 -1, %tmp8 ; <i64> [#uses=1]
38 call void @bar(i64 %tmp9)
subreg-to-reg-2.ll 11 define internal fastcc %XXValue* @t(i64* %out, %"struct.XXC::ArrayStorage"* %tmp9) nounwind {
22 %tmp11 = getelementptr %"struct.XXC::ArrayStorage"* %tmp9, i64 0, i32 5, i64 %tmp10 ; <%XXValue**> [#uses=1]
sse3.ll 111 %tmp9 = insertelement <8 x i16> %tmp8, i16 %tmp1, i32 1
112 %tmp10 = insertelement <8 x i16> %tmp9, i16 %tmp0, i32 2
138 %tmp9 = extractelement <4 x float> %tmp6, i32 1
142 %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3
196 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
197 ret <8 x i16> %tmp9
210 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef >
211 ret <8 x i16> %tmp9
223 %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef >
224 ret <8 x i16> %tmp9
    [all...]
  /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
2008-04-29-VolatileLoadDontMerge.ll 18 %tmp9 = icmp slt i32 %tmp6, 10 ; <i1> [#uses=1]
20 br i1 %tmp9, label %bb, label %bb11
2008-05-08-StrLenSink.ll 19 %tmp9 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
20 store i8 0, i8* %tmp9, align 1
2008-07-08-VolatileLoadMerge.ll 19 %tmp9 = icmp slt i32 %tmp6, 10 ; <i1> [#uses=1]
21 br i1 %tmp9, label %bb, label %bb11
2010-11-01-lshr-mask.ll 37 %tmp9 = or i8 %tmp7, %tmp8
44 %tmp12 = xor i8 %tmp11, %tmp9
and2.ll 5 %tmp9 = fcmp ord double %X, 0.000000e+00
7 %bothcond = and i1 %tmp13, %tmp9
urem-simplify-bug.ll 13 %tmp9 = urem i32 %tmp67, 95 ; <i32> [#uses=1]
14 %tmp10 = and i32 %tmp9, 1 ; <i32> [#uses=1]
  /external/swiftshader/third_party/LLVM/test/Transforms/TailCallElim/
reorder_load.ll 25 %tmp9 = load i32* %a_arg ; <i32> [#uses=1]
26 %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
51 %tmp9 = load i32* @global ; <i32> [#uses=1]
52 %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
70 %tmp9 = load i32* @extern_weak_global ; <i32> [#uses=1]
71 %tmp10 = add i32 %tmp9, %tmp8 ; <i32> [#uses=1]
  /external/llvm/test/Transforms/InstCombine/
gepphigep.ll 8 define i32 @test1(%struct1* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
15 %tmp10 = getelementptr inbounds %struct2, %struct2* %tmp1, i64 %tmp9
33 ; CHECK: getelementptr inbounds %struct2, %struct2* %tmp1, i64 %tmp9, i32 0
35 ; CHECK: %[[PHI:[0-9A-Za-z]+]] = phi i64 [ %tmp9, %bb1 ], [ %tmp19, %bb2 ]
40 define i32 @test2(%struct1* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19) {
44 %tmp10 = getelementptr inbounds %struct2, %struct2* %tmp1, i64 %tmp9
55 ; CHECK: getelementptr inbounds %struct2, %struct2* %tmp1, i64 %tmp9, i32 0
57 ; CHECK: getelementptr inbounds %struct2, %struct2* %tmp1, i64 %tmp9, i32 1
62 define i32 @test3(%struct3* %dm, i1 %tmp4, i64 %tmp9, i64 %tmp19, i64 %tmp20, i64 %tmp21) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
  /external/llvm/test/Transforms/CodeGenPrepare/AMDGPU/
no-sink-addrspacecast.ll 20 %tmp9 = tail call float @llvm.fma.f32(float %tmp5, float 0x3FE45F3060000000, float 5.000000e-01) #1
21 %tmp10 = fmul float %tmp9, 0x3E74442D00000000
23 %tmp12 = tail call float @llvm.fma.f32(float %tmp9, float 0x3E74442D00000000, float %tmp11) #1
  /external/llvm/test/Transforms/SafeStack/
phi-cycle.ll 28 %tmp9 = phi i32 [ %tmp14, %bb17 ], [ %tmp1, %bb ]
32 %tmp13 = add nsw i32 %tmp9, 8
33 %tmp14 = select i1 %tmp12, i32 %tmp13, i32 %tmp9
  /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
thumb2-ifcvt2.ll 43 %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2]
47 %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1]
55 %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0]
  /external/llvm/test/Analysis/CFLAliasAnalysis/Steensgaard/
full-store-partial-alias.ll 23 %tmp9 = getelementptr inbounds %union.anon, %union.anon* %u, i64 0, i32 0
24 store double %x, double* %tmp9, align 8, !tbaa !0
  /external/llvm/test/Analysis/Delinearization/
parameter_addrec_product.ll 36 %tmp9 = add nsw i64 %tmp8, %j.0
37 %tmp10 = getelementptr inbounds float, float* %A, i64 %tmp9
  /external/llvm/test/Analysis/ScalarEvolution/
min-max-exprs.ll 33 %tmp9 = select i1 %tmp4, i64 %tmp5, i64 %tmp6
37 %tmp11 = getelementptr inbounds i32, i32* %A, i64 %tmp9
  /external/llvm/test/CodeGen/AArch64/
dag-combine-invaraints.ll 18 %tmp9 = load i32, i32* %i32T, align 4
20 %DHSelect = select i1 %tmp8, i32 %tmp9, i32 %tmp10
  /external/llvm/test/CodeGen/ARM/
2010-05-21-BuildVector.ll 22 %tmp9 = insertelement <4 x float> %tmp11, float %10, i32 1
29 %tmp7 = insertelement <4 x float> %tmp9, float %14, i32 2
  /external/llvm/test/CodeGen/Hexagon/
ctlz-cttz-ctpop.ll 22 %tmp9 = add i32 %tmp6, %tmp7
23 %tmp10 = add i32 %tmp9, %tmp8
  /external/llvm/test/CodeGen/PowerPC/
pr16556-2.ll 38 %tmp9 = fptosi ppc_fp128 %tmp8 to i64
39 ret i64 %tmp9
  /external/llvm/test/CodeGen/Thumb/
2007-05-05-InvalidPushPop.ll 30 %tmp9 = load i32, i32* %t ; <i32> [#uses=1]
31 %tmp11 = call i32 @pthread_join( i32 %tmp9, i8** %ret3 ) ; <i32> [#uses=0]
rev.ll 11 %tmp9 = and i32 %tmp1, 255
15 %tmp14 = or i32 %tmp10, %tmp9
  /external/llvm/test/CodeGen/X86/
clobber-fi0.ll 27 %tmp9 = load i32, i32* %tmp ; [#uses=1 type=i32]
28 %tmp10 = add i32 %tmp9, -1 ; [#uses=1 type=i32]
coalescer-commute4.ll 20 %tmp9 = load float, float* %tmp8, align 4 ; <float> [#uses=1]
21 %tmp11 = fmul float %tmp9, %tmp45 ; <float> [#uses=1]

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