| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| 2006-07-31-SingleRegClass.ll | 7 %tmp9.i.i = call i32 asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"( i32 192, i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i ) ; <i32> [#uses=1]
8 ret i32 %tmp9.i.i
|
| 2008-01-08-IllegalCMP.ll | 9 %tmp9 = icmp slt i64 %w.0, 0 ; <i1> [#uses=1]
10 br i1 %tmp9, label %bb12, label %bb13
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| 2009-03-09-APIntCrash.ll | 12 %tmp9 = mul i128 %tmp15, 18446744073709551616000 ; <i128> [#uses=1]
16 %retval.0 = phi i128 [ %tmp9, %if.then ], [ undef, %entry ] ; <i128> [#uses=0]
|
| commute-intrinsic.ll | 9 %tmp9 = bitcast <2 x i64> %tmp2 to <8 x i16> ; <<8 x i16>> [#uses=1]
10 %tmp11 = tail call <4 x i32> @llvm.x86.sse2.pmadd.wd( <8 x i16> %tmp9, <8 x i16> %tmp6 ) nounwind readnone ; <<4 x i32>> [#uses=1]
|
| lea.ll | 25 %tmp9 = add i32 %tmp8, -4
26 ret i32 %tmp9
|
| stride-reuse.ll | 22 %tmp9 = add i32 %tmp8, 64
24 store i32 %tmp9, i32* %tmp10, align 4
|
| vec_set-3.ll | 13 %tmp9 = insertelement <4 x i32> %tmp7, i32 0, i32 3 ; <<4 x i32>> [#uses=1]
14 %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64> ; <<2 x i64>> [#uses=1]
|
| vec_set-F.ll | 16 %tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1
17 %tmp11 = bitcast <2 x double> %tmp9 to <2 x i64>
|
| vec_shuffle-18.ll | 7 %tmp9 = getelementptr %struct.vector4_t* %b, i32 0, i32 0 ; <<4 x float>*> [#uses=2]
8 %tmp10 = load <4 x float>* %tmp9, align 16 ; <<4 x float>> [#uses=1]
14 store <4 x float> %tmp19, <4 x float>* %tmp9, align 16
|
| 2007-11-03-x86-64-q-constraint.ll | 7 %tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i64* null, i64 0 ) ; <i64>
|
| vec_logical.ll | 14 %tmp9 = bitcast <4 x float> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
16 %tmp11 = xor <4 x i32> %tmp9, %tmp10 ; <<4 x i32>> [#uses=1]
23 %tmp9 = bitcast <2 x double> %a to <2 x i64> ; <<2 x i64>> [#uses=1]
25 %tmp11 = and <2 x i64> %tmp9, %tmp10 ; <<2 x i64>> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| 2008-05-08-LiveStoreDelete.ll | 15 %tmp9 = getelementptr i8* %tmp1, i32 0 ; <i8*> [#uses=1]
16 store i8 0, i8* %tmp9, align 1
|
| shufflevec-constant.ll | 12 %tmp9 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp8, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x float>> [#uses=0]
13 ret <4 x float> %tmp9
|
| /external/swiftshader/third_party/LLVM/test/Transforms/ScalarRepl/ |
| 2008-02-28-SubElementExtractCrash.ll | 13 %tmp9 = getelementptr [2 x i32]* %tmp78, i32 0, i32 0 ; <i32*> [#uses=1]
14 %tmp10 = load i32* %tmp9, align 4 ; <i32> [#uses=0]
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| r600-infinite-loop-bug-while-reorganizing-vector.ll | 13 %tmp9 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %tmp8)
14 %tmp10 = extractelement <4 x float> %tmp9, i32 0
15 %tmp11 = extractelement <4 x float> %tmp9, i32 1
16 %tmp12 = extractelement <4 x float> %tmp9, i32 2
17 %tmp13 = extractelement <4 x float> %tmp9, i32 3
|
| commute-shifts.ll | 19 %tmp9 = bitcast i32 %tmp8 to float
20 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float undef, float %tmp9, float undef, float %tmp9)
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-11-16-MachineLICM.ll | 20 %tmp9 = shl i64 %indvar, 2 ; <i64> [#uses=4]
21 %tmp1016 = or i64 %tmp9, 1 ; <i64> [#uses=1]
23 %tmp1117 = or i64 %tmp9, 2 ; <i64> [#uses=1]
25 %tmp1318 = or i64 %tmp9, 3 ; <i64> [#uses=1]
27 %x_addr.03 = getelementptr float, float* %x, i64 %tmp9 ; <float*> [#uses=1]
|
| 2007-11-03-x86-64-q-constraint.ll | 7 %tmp9 = call i64 asm sideeffect "xchgb ${0:b},$1", "=q,*m,0,~{dirflag},~{fpsr},~{flags},~{memory}"( i64* null, i64 0 ) ; <i64>
|
| fold-and-shift.ll | 15 %tmp9 = load i32, i32* %tmp78
16 ret i32 %tmp9
31 %tmp9 = load i32, i32* %tmp78
32 ret i32 %tmp9
|
| /external/llvm/test/Transforms/Reassociate/ |
| repeats.ll | 139 %tmp9 = mul i4 %tmp8, %x
140 ret i4 %tmp9
159 %tmp9 = mul i4 %tmp8, %x
160 %tmp10 = mul i4 %tmp9, %x
178 %tmp9 = mul i4 %tmp8, %x
179 %tmp10 = mul i4 %tmp9, %x
199 %tmp9 = mul i4 %tmp8, %x
200 %tmp10 = mul i4 %tmp9, %x
221 %tmp9 = mul i4 %tmp8, %x
222 %tmp10 = mul i4 %tmp9, %
[all...] |
| /external/llvm/test/Analysis/ScalarEvolution/ |
| pr25369.ll | 23 %tmp9 = add i32 undef, %tmp8
24 %tmp10 = add i32 undef, %tmp9
60 %tmp9 = add i32 undef, %tmp8
61 %tmp10 = add i32 undef, %tmp9
|
| /external/llvm/test/CodeGen/PowerPC/ |
| vec_shuffle_p8vector.ll | 14 %tmp9 = bitcast <4 x i32> %tmp8 to <2 x i64>
15 store <2 x i64> %tmp9, <2 x i64>* %A
38 %tmp9 = insertelement <4 x i32> undef, i32 %tmp5, i32 0
39 %tmp10 = insertelement <4 x i32> %tmp9, i32 %tmp6, i32 1
|
| /external/llvm/test/Transforms/GlobalDCE/ |
| complex-constantexpr.ll | 37 %tmp9 = load i32, i32* @global7, align 4
38 %tmp10 = icmp eq i32 %tmp9, 0
85 %tmp9 = icmp eq i32 %tmp8, 0
86 %tmp10 = zext i1 %tmp9 to i32
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| pr24356.ll | 17 ; CHECK: %tmp9 = icmp ugt i8 %b.03, 1
18 ; CHECK-NOT: %tmp9 = icmp ugt i8 0, 1
20 %tmp9 = icmp ugt i8 %b.03, 1
21 br i1 %tmp9, label %bb4.preheader.bb18.loopexit.split_crit_edge, label %bb4.preheader.bb4.preheader.split_crit_edge
|
| /external/llvm/test/Analysis/BasicAA/ |
| full-store-partial-alias.ll | 21 %tmp9 = getelementptr inbounds %union.anon, %union.anon* %u, i64 0, i32 0
22 store double %x, double* %tmp9, align 8, !tbaa !0
|
