/art/compiler/optimizing/ |
induction_var_analysis_test.cc | 416 HInstruction* add2 = InsertInstruction( local 419 new (&allocator_) HAdd(Primitive::kPrimInt, add1, add2), 0); 424 EXPECT_STREQ("((1) * i + (7)):PrimInt", GetInductionInfo(add2, 0).c_str()); 516 HInstruction* add2 = InsertInstruction( local 530 GetInductionInfo(add2, 0).c_str()); 573 HInstruction* add2 = InsertInstruction( local 589 EXPECT_STREQ("geo((2) * 2 ^ i + (100)):PrimInt", GetInductionInfo(add2, 0).c_str()); [all...] |
/external/llvm/test/Transforms/LoopReroll/ |
basic.ll | 24 %add2 = add nsw i32 %i.08, 2 25 %call3 = tail call i32 @foo(i32 %add2) #1 519 %add2 = add nsw i32 %i.08, 2 520 %tmp2b = mul i32 %add2, %z 521 %tmp1b = add i32 %add2, %y
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/external/clang/test/OpenMP/ |
for_simd_codegen.cpp | 503 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 504 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] 578 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1 579 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]] 654 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1 655 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
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parallel_for_simd_codegen.cpp | 460 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 461 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] 534 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1 535 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]] 607 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1 608 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
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simd_codegen.cpp | 357 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 358 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]] 416 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1 417 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]] 472 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1 473 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]] [all...] |
/external/llvm/test/CodeGen/SystemZ/ |
cond-store-03.ll | 216 %add2 = add i64 %add1, 4096 217 %ptr = inttoptr i64 %add2 to i32 *
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int-cmp-05.ll | 198 %add2 = add i64 %add1, 524284 199 %ptr = inttoptr i64 %add2 to i32 *
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int-mul-08.ll | 185 %add2 = add i64 %add1, 524287 186 %ptr = inttoptr i64 %add2 to i64 *
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cond-store-01.ll | 287 %add2 = add i64 %add1, 4096 288 %ptr = inttoptr i64 %add2 to i8 *
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cond-store-02.ll | 287 %add2 = add i64 %add1, 4096 288 %ptr = inttoptr i64 %add2 to i16 *
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int-cmp-06.ll | 248 %add2 = add i64 %add1, 524284 249 %ptr = inttoptr i64 %add2 to i32 *
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vec-move-08.ll | 359 %add2 = add i64 %add1, 4095 360 %ptr = inttoptr i64 %add2 to i32 *
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/external/llvm/test/Transforms/SLPVectorizer/X86/ |
phi.ll | 82 %add2 = fadd double %G.018, 1.000000e+01 84 %mul3 = fmul double %add2, 4.000000e+00
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/external/webp/src/dsp/ |
lossless_msa.c | 94 ADD2(t0, t2, t1, t3, t0, t1); \ 260 ADD2(src0, tmp0, src1, tmp1, dst0, dst1);
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filters_msa.c | 114 ADD2(a0, b0, a1, b1, a0, a1);
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/fr30/ |
allinsn.d | 13 0+0004 <add2>: 14 4: a5 f3 add2 -1,r3
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/external/libvpx/libvpx/vp8/encoder/mips/msa/ |
quantize_msa.c | 136 ADD2(x0, round0, x1, round1, x0, x1);
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/external/llvm/test/CodeGen/AMDGPU/ |
salu-to-valu.ll | 336 %add2 = add i32 %add1, %elt3 337 %add3 = add i32 %add2, %elt4 416 %add2 = add i32 %add1, %elt3 417 %add3 = add i32 %add2, %elt4
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic6x/ |
insns-c674x.s | 117 add2 .S1 a7,a6,a5 118 [!b0] add2 .S1X a10,b9,a8 119 add2 .S2 b18,b17,b16 120 [b1] add2 .S2X b22,a29,b21 121 add2 .L1 a7,a6,a5 122 [a1] add2 .L1X a10,b9,a8 123 add2 .L2 b18,b17,b16 124 [!a1] add2 .L2X b22,a29,b21 125 add2 .D1 a7,a6,a5 126 [!b1] add2 .D1X a10,b9,a [all...] |
/external/llvm/test/Transforms/LoopVectorize/ |
global_alias.ll | 308 %add2 = add nsw i32 %3, %4 313 store i32 %add2, i32* %arrayidx4, align 4 [all...] |
/external/llvm/test/CodeGen/ARM/ |
ehabi.ll | 392 %add2 = add nsw i32 %add1, %d 393 tail call void @throw_exception_3(i32 %add2) 398 %add6 = add nsw i32 %add5, %add2
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/external/llvm/test/Analysis/DependenceAnalysis/ |
Coupled.ll | 30 %add2 = add nsw i64 %i.02, 10 31 %arrayidx4 = getelementptr inbounds [100 x i32], [100 x i32]* %A, i64 %add2, i64 %add 66 %add2 = add nsw i64 %i.02, 9 67 %arrayidx4 = getelementptr inbounds [100 x i32], [100 x i32]* %A, i64 %add2, i64 %add
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StrongSIV.ll | 425 %add2 = add i64 %mul1, 5 426 %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %add2
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SymbolicSIV.ll | 219 %add2 = sub i64 %n, %i.03 220 %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %add2
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/external/libvpx/libvpx/vpx_dsp/mips/ |
idct32x32_msa.c | 156 ADD2(reg5, reg4, reg3, reg2, vec0, vec1); 462 ADD2(reg5, reg4, reg3, reg2, vec0, vec1);
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