| /external/llvm/test/CodeGen/Hexagon/ |
| tls_static.ll | 3 @dst_le = thread_local global i32 0, align 4
4 @src_le = thread_local global i32 0, align 4
11 %0 = load i32, i32* @src_le, align 4
12 store i32 %0, i32* @dst_le, align 4
24 %0 = load i32, i32* @src_ie, align 4
25 store i32 %0, i32* @dst_ie, align 4
|
| /external/llvm/test/CodeGen/Mips/ |
| div.ll | 3 @iiii = global i32 100, align 4
4 @jjjj = global i32 -4, align 4
5 @kkkk = common global i32 0, align 4
9 %0 = load i32, i32* @iiii, align 4
10 %1 = load i32, i32* @jjjj, align 4
14 store i32 %div, i32* @kkkk, align 4
|
| divu.ll | 3 @iiii = global i32 100, align 4
4 @jjjj = global i32 4, align 4
5 @kkkk = common global i32 0, align 4
9 %0 = load i32, i32* @iiii, align 4
10 %1 = load i32, i32* @jjjj, align 4
14 store i32 %div, i32* @kkkk, align 4
|
| lhu1.ll | 4 @s = global i16 255, align 2
5 @.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
9 %i = alloca i32, align 4
10 %0 = load i16, i16* @s, align 2
13 store i32 %conv, i32* %i, align 4
14 %1 = load i32, i32* %i, align 4
|
| mul.ll | 3 @iiii = global i32 5, align 4
4 @jjjj = global i32 -6, align 4
5 @kkkk = common global i32 0, align 4
9 %0 = load i32, i32* @iiii, align 4
10 %1 = load i32, i32* @jjjj, align 4
15 store i32 %mul, i32* @kkkk, align 4
|
| rem.ll | 3 @iiii = global i32 103, align 4
4 @jjjj = global i32 -4, align 4
5 @kkkk = common global i32 0, align 4
10 %0 = load i32, i32* @iiii, align 4
11 %1 = load i32, i32* @jjjj, align 4
15 store i32 %rem, i32* @kkkk, align 4
|
| setgek.ll | 3 @k = global i32 10, align 4
4 @r1 = common global i32 0, align 4
5 @r2 = common global i32 0, align 4
6 @r3 = common global i32 0, align 4
10 %0 = load i32, i32* @k, align 4
13 store i32 %conv, i32* @r1, align 4
|
| vector-setcc.ll | 3 @a = common global <4 x i32> zeroinitializer, align 16
4 @b = common global <4 x i32> zeroinitializer, align 16
5 @g0 = common global <4 x i32> zeroinitializer, align 16
9 %0 = load <4 x i32>, <4 x i32>* @a, align 16
10 %1 = load <4 x i32>, <4 x i32>* @b, align 16
13 store <4 x i32> %sext, <4 x i32>* @g0, align 16
|
| /external/llvm/test/CodeGen/PowerPC/ |
| fp-int-conversions-direct-moves.ll | 7 %arg.addr = alloca float, align 4
8 store float %arg, float* %arg.addr, align 4
9 %0 = load float, float* %arg.addr, align 4
20 %arg.addr = alloca i8, align 1
21 store i8 %arg, i8* %arg.addr, align 1
22 %0 = load i8, i8* %arg.addr, align 1
33 %arg.addr = alloca double, align 8
34 store double %arg, double* %arg.addr, align 8
35 %0 = load double, double* %arg.addr, align 8
46 %arg.addr = alloca i8, align
[all...] |
| vsx-ldst.ll | 16 @vsi = global <4 x i32> <i32 -1, i32 2, i32 -3, i32 4>, align 16
17 @vui = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
18 @vf = global <4 x float> <float -1.500000e+00, float 2.500000e+00, float -3.500000e+00, float 4.500000e+00>, align 16
19 @vsll = global <2 x i64> <i64 255, i64 -937>, align 16
20 @vull = global <2 x i64> <i64 1447, i64 2894>, align 16
21 @vd = global <2 x double> <double 3.500000e+00, double -7.500000e+00>, align 16
22 @res_vsi = common global <4 x i32> zeroinitializer, align 16
23 @res_vui = common global <4 x i32> zeroinitializer, align 16
24 @res_vf = common global <4 x float> zeroinitializer, align 16
25 @res_vsll = common global <2 x i64> zeroinitializer, align 1
[all...] |
| /external/llvm/test/CodeGen/SPARC/ |
| LeonReplaceFMULSPassUT.ll | 10 %a = alloca float, align 4
11 %b = alloca float, align 4
12 store float 0x402ECCCCC0000000, float* %a, align 4
13 store float 0x4022333340000000, float* %b, align 4
14 %0 = load float, float* %b, align 4
15 %1 = load float, float* %a, align 4
|
| /external/llvm/test/ExecutionEngine/MCJIT/ |
| test-ptr-reloc-sm-pic.ll | 4 @.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
5 @ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
6 @.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
7 @ptr2 = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0), align 4
11 %0 = load i8*, i8** @ptr, align 4
12 %1 = load i8*, i8** @ptr2, align 4
|
| test-ptr-reloc.ll | 3 @.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
4 @ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
5 @.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
6 @ptr2 = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0), align 4
10 %0 = load i8*, i8** @ptr, align 4
11 %1 = load i8*, i8** @ptr2, align 4
|
| /external/llvm/test/ExecutionEngine/OrcMCJIT/ |
| test-ptr-reloc.ll | 3 @.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
4 @ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
5 @.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
6 @ptr2 = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str1, i32 0, i32 0), align 4
10 %0 = load i8*, i8** @ptr, align 4
11 %1 = load i8*, i8** @ptr2, align 4
|
| /external/llvm/test/Instrumentation/AddressSanitizer/X86/ |
| asm_more_registers_than_available.ll | 16 %S.addr = alloca i8*, align 8
17 %pS.addr = alloca i32, align 4
18 %D.addr = alloca i8*, align 8
19 %pD.addr = alloca i32, align 4
20 %h.addr = alloca i32, align 4
21 %sr = alloca i32, align 4
22 %pDiffD = alloca i32, align 4
23 %pDiffS = alloca i32, align 4
24 %flagSA = alloca i8, align 1
25 %flagDA = alloca i8, align
[all...] |
| /external/llvm/test/Instrumentation/AddressSanitizer/ |
| do-not-instrument-promotable-allocas.ll | 8 ; CHECK: %0 = alloca i32, align 4
9 ; CHECK: store i32 0, i32* %0, align 4
10 ; CHECK: %1 = load i32, i32* %0, align 4
17 %0 = alloca i32, align 4
18 store i32 0, i32* %0, align 4
19 %1 = load i32, i32* %0, align 4
|
| /external/llvm/test/Transforms/InstCombine/ |
| load-combine-metadata-2.ll | 6 ; Check that align metadata is combined
8 ; CHECK-SAME: !align ![[ALIGN:[0-9]+]]
10 %a = load i32*, i32** %0, !align !0
11 %b = load i32*, i32** %0, !align !1
17 ; CHECK: ![[ALIGN]] = !{i64 4}
|
| /external/llvm/test/Transforms/LoadStoreVectorizer/X86/ |
| subchain-interleaved.ll | 18 %l1 = load i32, i32* %next.gep1, align 4
19 %l2 = load i32, i32* %next.gep, align 4
20 store i32 0, i32* %next.gep1, align 4
21 store i32 0, i32* %next.gep, align 4
22 %l3 = load i32, i32* %next.gep1, align 4
23 %l4 = load i32, i32* %next.gep2, align 4
38 %l2 = load i32, i32* %next.gep, align 4
39 %l1 = load i32, i32* %next.gep1, align 4
40 store i32 0, i32* %next.gep1, align 4
41 store i32 0, i32* %next.gep, align
[all...] |
| /external/llvm/test/Transforms/MergeFunc/ |
| merge-block-address.ll | 14 %i.addr = alloca i32, align 4
15 %ret = alloca i32, align 4
16 %l = alloca i8*, align 8
17 store i32 %i, i32* %i.addr, align 4
18 store i32 0, i32* %ret, align 4
19 store i8* blockaddress(@_Z1fi, %val_0), i8** %l, align 8
20 %0 = load i32, i32* %i.addr, align 4
26 store i8* blockaddress(@_Z1fi, %val_1), i8** %l, align 8
30 %1 = load i8*, i8** %l, align 8
34 store i32 42, i32* %ret, align
[all...] |
| no-merge-block-address-different-labels.ll | 17 %i.addr = alloca i32, align 4
18 %ret = alloca i32, align 4
19 %l = alloca i8*, align 8
20 store i32 %i, i32* %i.addr, align 4
21 store i32 0, i32* %ret, align 4
23 store i8* blockaddress(@_Z1fi, %val_0), i8** %l, align 8
24 %0 = load i32, i32* %i.addr, align 4
30 store i8* blockaddress(@_Z1fi, %val_1), i8** %l, align 8
34 %1 = load i8*, i8** %l, align 8
38 store i32 12, i32* %ret, align
[all...] |
| /external/llvm/test/Transforms/SafeStack/ |
| escape-addr-pointer.ll | 4 @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
12 %a = alloca i32*, align 8
13 %b = alloca i32**, align 8
15 store i32* %call, i32** %a, align 8
16 store i32** %a, i32*** %b, align 8
17 %0 = load i32**, i32*** %b, align 8
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| preserve-load-metadata.ll | 7 ; Check that align metadata is combined
9 ; CHECK-SAME: !align ![[ALIGN:[0-9]+]]
16 %v1 = load i32*, i32** %p, !align !0
21 %v2 = load i32*, i32** %p, !align !1
29 ; CHECK: ![[ALIGN]] = !{i64 8}
|
| /toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/hppa/ |
| freg.s | 3 .SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
4 .SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
6 .SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
7 .SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
14 .align 4
15 .NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
|
| /external/clang/tools/scan-build/share/scan-build/ |
| scanview.css | 10 text-align:center;
15 th, td { padding:5px; padding-left:8px; text-align:left }
18 td.Q { text-align:right }
19 td { text-align:left }
41 text-align: right;
42 vertical-align: top;
46 text-align: right;
47 vertical-align: center;
50 text-align: left;
51 vertical-align: top
[all...] |
| /external/clang/tools/scan-build-py/libscanbuild/resources/ |
| scanview.css | 10 text-align:center;
15 th, td { padding:5px; padding-left:8px; text-align:left }
18 td.Q { text-align:right }
19 td { text-align:left }
41 text-align: right;
42 vertical-align: top;
46 text-align: right;
47 vertical-align: center;
50 text-align: left;
51 vertical-align: top
[all...] |
