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  /external/okhttp/okhttp-ws-tests/src/test/java/com/squareup/okhttp/internal/ws/
WebSocketReaderTest.java 93 assertEquals("Client-sent frames must be masked. Server sent must not.", e.getMessage());
103 assertEquals("Client-sent frames must be masked. Server sent must not.", e.getMessage());
  /external/stressapptest/src/
error_diag.cc 256 // HDD error was not masked by bad DIMMs: report bad HDD.
310 // HDD error was not masked by bad DIMMs: report bad HDD.
  /frameworks/base/wifi/tests/src/android/net/wifi/
WifiEnterpriseConfigTest.java 321 * Verifies that the copy constructor preseves both the masked password and inner method
337 * Verifies that the copy from external ignores masked passwords and preserves the
  /libcore/luni/src/test/java/libcore/java/nio/file/
WatchServiceTest.java 160 // emit EVENT_MODIFY (masked)
162 // emit EVENT_DELETE (masked)
  /system/core/libpixelflinger/codeflinger/
GGLAssembler.cpp 165 info.masked = !!(masking & mask);
166 info.inDest = !info.masked && mCbFormat.c[i].h &&
181 mMasking |= (mCbFormat.c[i].h && info.masked) ? mask : 0;
    [all...]
  /bionic/libc/kernel/uapi/asm-x86/asm/
kvm.h 268 __u8 masked; member in struct:kvm_vcpu_events::__anon320
  /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/
AcpiSsdtRootPci.asl 177 If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/AcpiTables/
AcpiSsdtRootPci.asl 177 If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
  /device/linaro/bootloader/edk2/PcAtChipsetPkg/Library/BaseIoApicLib/
IoApicLib.c 104 entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must
  /external/clang/test/CodeGenCXX/
catch-undef-behavior.cpp 376 // CHECK-NEXT: [[MASKED:%.+]] = and i64 [[C_INT]], 15
377 // CHECK-NEXT: [[TEST:%.+]] = icmp eq i64 [[MASKED]], 0
391 // CHECK-NEXT: [[MASKED:%.+]] = and i64 [[C_INT]], 15
392 // CHECK-NEXT: [[TEST:%.+]] = icmp eq i64 [[MASKED]], 0
copy-constructor-synthesis.cpp 27 au_i1(1234), au1_4("MASKED") {}
  /external/conscrypt/platform/src/test/java/org/conscrypt/ct/
CTLogStoreImplTest.java 138 // Logs 01 are present, log 2 is in the fallback and unused, log 3 is present but masked,
  /external/deqp/modules/gles3/functional/
es3fDepthStencilClearTests.cpp 121 DepthStencilClearCase (Context& context, const char* name, const char* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked);
145 DepthStencilClearCase::DepthStencilClearCase (Context& context, const char* name, const char* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked)
150 , m_masked (masked)
506 // iters clears depth stencil scissor masked
  /external/freetype/src/cache/
ftccache.h 222 /* Go to the `top' node of the list sharing same masked hash */ \
  /external/icu/icu4c/source/i18n/
rbt_set.h 110 * Check this for masked rules and index it to optimize performance.
  /external/iproute2/examples/diffserv/
Edge31-cb-chains 86 #note that the ECN bits are masked out
Edge32-cb-chains 98 #note that the ECN bits are masked out
Edge32-cb-u32 100 #note that the ECN bits are masked out
  /external/kernel-headers/original/uapi/asm-x86/asm/
kvm.h 310 __u8 masked; member in struct:kvm_vcpu_events::__anon21164
  /external/llvm/test/CodeGen/X86/
pshufb-mask-comments.ll 15 ; Test that indexes larger than the size of the vector are shown masked (bottom 4 bits).
  /external/llvm/test/MC/Disassembler/Hexagon/
xtype_bit.txt 78 # Masked parity
  /external/llvm/test/MC/Hexagon/instructions/
xtype_bit.s 78 # Masked parity
  /external/ltp/testcases/kernel/fs/scsi/ltpscsi/
sg_err.h 18 used a 1 bit right and masked version of these. So now CHECK_CONDITION
  /external/ltp/testcases/open_posix_testsuite/conformance/interfaces/sigaction/
29-1.c 175 FAILED("Signal was delivered while masked??");
  /external/okhttp/okhttp-ws/src/main/java/com/squareup/okhttp/internal/ws/
WebSocketProtocol.java 48 * Byte 1 flag for whether the payload data is masked.

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